Datasheet DAC8412, DAC8413 (Analog Devices) - 8

制造商Analog Devices
描述Quad, 12-Bit DAC Voltage Output with Readback
页数 / 页20 / 8 — DAC8412/DAC8413. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. …
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DAC8412/DAC8413. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. REFH. 28 VREFL. VOUTB 2. 27 VOUTC. 28 27 26. OUTA. 26 VOUTD

DAC8412/DAC8413 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REFH 28 VREFL VOUTB 2 27 VOUTC 28 27 26 OUTA 26 VOUTD

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DAC8412/DAC8413 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS A B H L C D A B H L C D V T T T T T T F F T T REFH 1 28 VREFL F F SS OU OU RE RE OU OU SS OU OU RE RE OU OU VOUTB 2 27 VOUTC V V V V V V V V V V V V V V V 4 3 2 1 28 27 26 4 3 2 1 28 27 26 OUTA 3 26 VOUTD VSS 4 25 VDD DGND 5 PIN 1 25 VDD DGND 5 25 V DGND 5 24 V DD LOGIC DAC8412/ INDENTFIER RESET 6 24 V RESET 6 24 V RESET 6 23 CS DAC8413 LOGIC LOGIC DAC8412/ LDAC LDAC 7 23 CS 7 TOP VIEW 22 A0 LDAC 7 23 CS DAC8412/ DAC8413 DB0 (LSB) 8 (Not to Scale) 21 A1 DB0 (LSB) 8 22 A0 DB0 (LSB) 8 22 DAC8413 A0 TOP VIEW DB1 9 20 R/W DB1 9 21 A1 DB1 9 TOP VIEW 21 A1 (Not to Scale) DB2 10 19 DB11 (MSB) (Not to Scale) DB2 10 20 R/W DB2 10 20 R/W DB3 11 18 DB10 DB3 11 19 DB11 (MSB) DB3 11 19 DB11 (MSB) DB4 12 17 DB9 DB5 13 16 DB8
8
12 13 14 15 16 17 18 12 13 14 15 16 17 18
00 9 10 4- 0
DB6 4 5 6 7 8 9 14 15 DB7
-00 4- 27 27 00
DB DB DB DB DB DB
274
DB4 DB5 DB6 DB7 DB8 DB9 DB10
00
DB10
00 Figure 7. PDIP/CERDIP Figure 8. PLCC Figure 9. LCC
Table 5. Pin Function Descriptions Pin Number Mnemonic Description
1 VREFH High-Side DAC Reference Input. 2 VOUTB DAC B Output. 3 VOUTA DAC A Output. 4 VSS Lower Rail Power Supply. 5 DGND Digital Ground. 6 RESET Reset Input and Output Registers to all 0s, Enabled at Active Low. 7 LDAC Load Data to DAC, Enabled at Active Low. 8 DB0 Data Bit 0, LSB. 9 DB1 Data Bit 1. 10 DB2 Data Bit 2. 11 DB3 Data Bit 3. 12 DB4 Data Bit 4. 13 DB5 Data Bit 5. 14 DB6 Data Bit 6. 15 DB7 Data Bit 7. 16 DB8 Data Bit 8. 17 DB9 Data Bit 9. 18 DB10 Data Bit 10. 19 DB11 Data Bit 11, MSB. 20 R/W Active Low to Write Data to DAC. Active high to readback previous data at data bit pins with VLOGIC connected to 5 V. 21 A1 Address Bit 1. 22 A0 Address Bit 0. 23 CS Chip Select, Enabled at Active Low. 24 VLOGIC Voltage Supply for Readback Function. Can be open circuit if not used. 25 VDD Upper Rail Power Supply. 26 VOUTD DAC D Output. 27 VOUTC DAC C Output. 28 VREFL Low-Side DAC Reference Input. Rev. G | Page 8 of 20 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Introduction DACs Glitch Reference Inputs Digital I/O Coding Supplies Amplifiers Reference Configurations Single +5 V Supply Operation Outline Dimensions Ordering Guide