Datasheet MCP4902, MCP4912, MCP4922 (Microchip) - 7

制造商Microchip
描述8/10/12-Bit Dual Voltage Output Digital-to-Analog Converter with SPI Interface
页数 / 页48 / 7 — MCP4902/4912/4922. AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS). …
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MCP4902/4912/4922. AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS). Electrical Specifications:. Parameters. Sym. Min. Typ. Max. Units

MCP4902/4912/4922 AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS) Electrical Specifications: Parameters Sym Min Typ Max Units

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MCP4902/4912/4922 AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS) Electrical Specifications:
Unless otherwise indicated, VDD= 2.7V – 5.5V, TA= -40 to +125°C. Typical values are at +25°C.
Parameters Sym Min Typ Max Units Conditions
Schmitt Trigger High-Level VIH 0.7 VDD — — V Input Voltage (All digital input pins) Schmitt Trigger Low-Level VIL — — 0.2 VDD V Input Voltage (All digital input pins) Hysteresis of Schmitt Trigger VHYS — 0.05 VDD — V Inputs Input Leakage Current ILEAKAGE -1 — 1 A SHDN = LDAC = CS = SDI = SCK + VREF = VDD or VSS Digital Pin Capacitance CIN, — 10 — pF VDD = 5.0V, TA = +25°C, (All inputs/outputs) COUT fCLK = 1 MHz
(Note 1)
Clock Frequency FCLK — — 20 MHz TA = +25°C
(Note 1 )
Clock High Time tHI 15 — — ns
Note 1
Clock Low Time tLO 15 — — ns
Note 1
CS Fall to First Rising CLK tCSSR 40 — — ns Applies only when CS falls with Edge CLK high.
(Note 1)
Data Input Setup Time tSU 15 — — ns
Note 1
Data Input Hold Time tHD 10 — — ns
Note 1
SCK Rise to CS Rise Hold tCHS 15 — — ns
Note 1
Time CS High Time tCSH 15 — — ns
Note 1
LDAC Pulse Width tLD 100 — — ns
Note 1
LDAC Setup Time tLS 40 — — ns
Note 1
SCK Idle Time before CS Fall tIDLE 40 — — ns
Note 1 Note 1:
This parameter is ensured by design and not 100% tested. tCSH CS tIDLE tCSSR t t HI LO tCHS Mode 1,1 SCK Mode 0,0 t t SU HD SI MSb in LSb in LDAC t t LS LD
FIGURE 1-1:
SPI Input Timing Data.  2010 Microchip Technology Inc. DS22250A-page 7 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: SPI Input Timing Data. 2.0 Typical Performance Curves FIGURE 2-1: DNL vs. Code (MCP4922). FIGURE 2-2: DNL vs. Code and Temperature (MCP4922). FIGURE 2-3: DNL vs. Code and VREF, Gain = 1 (MCP4922). FIGURE 2-4: Absolute DNL vs. Temperature (MCP4922). FIGURE 2-5: Absolute DNL vs. Voltage Reference (MCP4922). FIGURE 2-6: INL vs. Code and Temperature (MCP4922). FIGURE 2-7: Absolute INL vs. Temperature (MCP4922). FIGURE 2-8: Absolute INL vs. VREF (MCP4922). FIGURE 2-9: INL vs. Code and VREF (MCP4922). FIGURE 2-10: INL vs. Code (MCP4922). FIGURE 2-11: DNL vs. Code and Temperature (MCP4912). FIGURE 2-12: INL vs. Code and Temperature (MCP4912). FIGURE 2-13: DNL vs. Code and Temperature (MCP4902). FIGURE 2-14: INL vs. Code and Temperature (MCP4902). FIGURE 2-15: IDD vs. Temperature and VDD. FIGURE 2-16: IDD Histogram (VDD = 2.7V). FIGURE 2-17: IDD Histogram (VDD = 5.0V). FIGURE 2-18: Hardware Shutdown Current vs. Ambient Temperature and VDD. FIGURE 2-19: Software Shutdown Current vs. Ambient Temperature and VDD. FIGURE 2-20: Offset Error vs. Ambient Temperature and VDD. FIGURE 2-21: Gain Error vs. Ambient Temperature and VDD. FIGURE 2-22: VIN High Threshold vs Ambient Temperature and VDD. FIGURE 2-23: VIN Low Threshold vs Ambient Temperature and VDD. FIGURE 2-24: Input Hysteresis vs. Ambient Temperature and VDD. FIGURE 2-25: VREF Input Impedance vs. Ambient Temperature and VDD. FIGURE 2-26: VOUT High Limit vs. Ambient Temperature and VDD. FIGURE 2-27: VOUT Low Limit vs. Ambient Temperature and VDD. FIGURE 2-28: IOUT High Short vs. Ambient Temperature and VDD. FIGURE 2-29: IOUT vs VOUT. Gain = 1x. FIGURE 2-30: VOUT Rise Time. FIGURE 2-31: VOUT Fall Time. FIGURE 2-32: VOUT Rise Time. FIGURE 2-33: VOUT Rise Time. FIGURE 2-34: VOUT Rise Time Exit Shutdown. FIGURE 2-35: PSRR vs. Frequency. FIGURE 2-36: Multiplier Mode Bandwidth. FIGURE 2-37: -3 db Bandwidth vs. Worst Codes. FIGURE 2-38: Phase Shift. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Supply Voltage Pins (VDD, VSS) 3.2 Chip Select (CS) 3.3 Serial Clock Input (SCK) 3.4 Serial Data Input (SDI) 3.5 Latch DAC Input (LDAC) 3.6 Hardware Shutdown Input (SHDN) 3.7 Analog Outputs (VOUTA, VOUTB) 3.8 Voltage Reference Inputs (VREFA, VREFB) 4.0 General Overview TABLE 4-1: LSb of each device 4.1 DC Accuracy FIGURE 4-1: Example for INL Error. FIGURE 4-2: Example for DNL Accuracy. 4.2 Circuit Descriptions FIGURE 4-3: Typical Transient Response. FIGURE 4-4: Output Stage for Shutdown Mode. 5.0 Serial Interface 5.1 Overview 5.2 Write Command FIGURE 5-1: Write Command for MCP4922 (12-bit DAC). FIGURE 5-2: Write Command for MCP4912 (10-bit DAC). FIGURE 5-3: Write Command for MCP4902 (8-bit DAC). 6.0 Typical Applications 6.1 Digital Interface 6.2 Power Supply Considerations FIGURE 6-1: Typical Connection Diagram. 6.3 Layout Considerations 6.4 Single-Supply Operation 6.5 Bipolar Operation 6.6 Selectable Gain and Offset Bipolar Voltage Output Using a Dual DAC 6.7 Designing a Double-Precision DAC Using a Dual DAC 6.8 Building Programmable Current Source 6.9 Using Multiplier Mode 7.0 Development support 7.1 Evaluation and Demonstration Boards 8.0 Packaging Information 8.1 Package Marking Information Trademarks Worldwide Sales and Service