Datasheet LTC4306 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | 4-Channel, 2-Wire Bus Multiplexer with Capacitance Buffering |
| 页数 / 页 | 20 / 1 — FEATURES. DESCRIPTIO. 1:4 2-Wire Multiplexer/Switch. Connect SDA and SCL … |
| 文件格式/大小 | PDF / 275 Kb |
| 文件语言 | 英语 |
FEATURES. DESCRIPTIO. 1:4 2-Wire Multiplexer/Switch. Connect SDA and SCL Lines with 2-Wire Bus. Commands
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文件文字版本
LTC4306 4-Channel, 2-Wire Bus Multiplexer with Capacitance Buffering
U FEATURES DESCRIPTIO
■
1:4 2-Wire Multiplexer/Switch
The LTC®4306 is a 4-channel, 2-wire bus multiplexer with ■
Connect SDA and SCL Lines with 2-Wire Bus
bus buffers to provide capacitive isolation between the
Commands
upstream bus and downstream buses. Through software ■
Supply Independent Bidirectional Buffer for SDA
control, the LTC4306 connects the upstream 2-wire bus to
and SCL Lines Increases Fan-Out
any desired combination of downstream buses. Each ■
Programmable Disconnect from Stuck Bus
channel can be pulled up to a supply voltage ranging from ■ Compatible with I2C and SMBus Standards 2.2V to 5.5V, independent of the LTC4306 supply voltage. ■ Rise Time Accelerator Circuitry The downstream channels are also provided with ■ SMBus Compatible ALERT Response Protocol ALERT1-ALERT4 inputs for fault reporting. ■ Two General Purpose Inputs-Outputs Programmable timeout circuitry disconnects the down- ■ Prevents SDA and SCL Corruption During Live Board stream buses if the bus is stuck low. When activated, rise Insertion and Removal from Backplane time accelerators source currents into the 2-wire bus pins ■ ±10kV Human Body Model ESD Ruggedness to reduce rise time. Driving the ENABLE pin low restores ■ 24-Lead QFN (4mm × 5mm) and SSOP Packages all features to their default states. Three address pins
U
provide 27 distinct addresses.
APPLICATIO S
The LTC4306 is available in 24-lead QFN (4mm × 5mm) ■ Nested Addressing and SSOP packages. ■ 5V/3.3V Level Translator , LTC and LT are registered trademarks of Linear Technology Corporation. ■ Capacitance Buffer/Bus Extender All other trademarks are the property of their respective owners. Patent pending.
U TYPICAL APPLICATIO A Level Shifting and Nested Addressing Application
2.5V 3.3V
I2C Bus Waveforms
0.01µF VCC = 3.3V 10k 10k 10k 10k 10k 10k V VBACK = 2.5V CC SCLIN SCLIN SCL1 2V/DIV MICRO- SFP SDAIN SDA1 CONTROLLER MODULE 1 ALERT ALERT1 VCARD1 = 3.3V ADDRESS = 1111 000 SCL1 2V/DIV 5V LTC4306 • • • 10k 10k 10k VCARD4 = 5V ADR2 SCL4 SFP SCL4 ADR1 SDA4 2V/DIV MODULE 4 ADR0 ALERT4 GND 4306 TA01b 4306 TA01a ADDRESS = 1111 000 500ns/DIV ADDRESS = 1000 100 4306f 1
U FEATURES DESCRIPTIO
■
1:4 2-Wire Multiplexer/Switch
The LTC®4306 is a 4-channel, 2-wire bus multiplexer with ■
Connect SDA and SCL Lines with 2-Wire Bus
bus buffers to provide capacitive isolation between the
Commands
upstream bus and downstream buses. Through software ■
Supply Independent Bidirectional Buffer for SDA
control, the LTC4306 connects the upstream 2-wire bus to
and SCL Lines Increases Fan-Out
any desired combination of downstream buses. Each ■
Programmable Disconnect from Stuck Bus
channel can be pulled up to a supply voltage ranging from ■ Compatible with I2C and SMBus Standards 2.2V to 5.5V, independent of the LTC4306 supply voltage. ■ Rise Time Accelerator Circuitry The downstream channels are also provided with ■ SMBus Compatible ALERT Response Protocol ALERT1-ALERT4 inputs for fault reporting. ■ Two General Purpose Inputs-Outputs Programmable timeout circuitry disconnects the down- ■ Prevents SDA and SCL Corruption During Live Board stream buses if the bus is stuck low. When activated, rise Insertion and Removal from Backplane time accelerators source currents into the 2-wire bus pins ■ ±10kV Human Body Model ESD Ruggedness to reduce rise time. Driving the ENABLE pin low restores ■ 24-Lead QFN (4mm × 5mm) and SSOP Packages all features to their default states. Three address pins
U
provide 27 distinct addresses.
APPLICATIO S
The LTC4306 is available in 24-lead QFN (4mm × 5mm) ■ Nested Addressing and SSOP packages. ■ 5V/3.3V Level Translator , LTC and LT are registered trademarks of Linear Technology Corporation. ■ Capacitance Buffer/Bus Extender All other trademarks are the property of their respective owners. Patent pending.
U TYPICAL APPLICATIO A Level Shifting and Nested Addressing Application
2.5V 3.3V
I2C Bus Waveforms
0.01µF VCC = 3.3V 10k 10k 10k 10k 10k 10k V VBACK = 2.5V CC SCLIN SCLIN SCL1 2V/DIV MICRO- SFP SDAIN SDA1 CONTROLLER MODULE 1 ALERT ALERT1 VCARD1 = 3.3V ADDRESS = 1111 000 SCL1 2V/DIV 5V LTC4306 • • • 10k 10k 10k VCARD4 = 5V ADR2 SCL4 SFP SCL4 ADR1 SDA4 2V/DIV MODULE 4 ADR0 ALERT4 GND 4306 TA01b 4306 TA01a ADDRESS = 1111 000 500ns/DIV ADDRESS = 1000 100 4306f 1