Datasheet LTC4315 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 2-Wire Bus Buffer with High Noise Margin |
| 页数 / 页 | 20 / 4 — ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 282 Kb |
| 文件语言 | 英语 |
ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply over the full operating
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LTC4315
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = VCC2 = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IACC(IN, Z) Allowable Leakage Current in VCC = VCC2 = 5V l ±5 μA the Open State VREADY(OL) READY Output Low Voltage IREADY = 3mA, VCC = 5V l 0.4 V IREADY(OH) READY Off Leakage Current VCC = VREADY = 5V l 0.1 ±5 μA
Stuck Low Timeout Circuitry
tTIMEOUT Bus Stuck Low Timer SDAOUT or SCLOUT < 0.3 • VMIN (Note 5) l 35 45 55 ms VFAULT(OL) FAULT Output Low voltage IFAULT = 3mA l 0.4 V IFAULT(OH) FAULT Off Leakage Current VCC = VFAULT = 5V l 0.1 ±5 μA
I2C Interface Timing
fSCL(MAX) I2C Frequency Max l 400 kHz tPDHL SCL, SDA Fall Delay VCC = VCC2 = VDD(BUS) = 5V, CBUS = 100pF, 130 250 ns RBUS = 10kΩ (Note 7) tf SCL, SDA Fall Times VCC = VCC2 = VDD(BUS) = 5V, CBUS = 100pF, 20 300 ns RBUS = 10kΩ (Note 7) tIDLE Bus Idle Time l 55 95 175 μs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
VMIN = minimum of VCC and VCC2 if VCC2 > 2.25V, otherwise may cause permanent damage to the device. Exposure to any Absolute VMIN = VCC. Maximum Rating condition for extended periods may affect device
Note 6:
VIL is tested for the following (VCC, VCC2) combinations; reliability and lifetime. (2.9V, 5.5V), (5.5V, 2.25V), (3.3V, 3.3V) and (5V, 0V).
Note 2:
All currents into pins are positive and all voltages are referenced
Note 7:
Guaranteed by design and not tested. to GND unless otherwise indicated.
Note 8:
Measured in a special DC mode with VSDA,SCL = VRTA(TH) + 1V.
Note 3:
The LTC4315 can level translate bus voltages ranging from The transient IRTA during rising edges, when ACC is LOW, will depend on 2.25V to 5.5V. In special cases, it can also level translate down to 1.4V. the bus loading condition and the slew rate of the bus. The LTC4315’s See the Applications Information section for more details. internal slew rate control circuitry limits the maximum bus rise rate to
Note 4:
Test performed with SDA, SCL buffers active. 75V/μs by controlling the transient IRTA. 4315f 4 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = VCC2 = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IACC(IN, Z) Allowable Leakage Current in VCC = VCC2 = 5V l ±5 μA the Open State VREADY(OL) READY Output Low Voltage IREADY = 3mA, VCC = 5V l 0.4 V IREADY(OH) READY Off Leakage Current VCC = VREADY = 5V l 0.1 ±5 μA
Stuck Low Timeout Circuitry
tTIMEOUT Bus Stuck Low Timer SDAOUT or SCLOUT < 0.3 • VMIN (Note 5) l 35 45 55 ms VFAULT(OL) FAULT Output Low voltage IFAULT = 3mA l 0.4 V IFAULT(OH) FAULT Off Leakage Current VCC = VFAULT = 5V l 0.1 ±5 μA
I2C Interface Timing
fSCL(MAX) I2C Frequency Max l 400 kHz tPDHL SCL, SDA Fall Delay VCC = VCC2 = VDD(BUS) = 5V, CBUS = 100pF, 130 250 ns RBUS = 10kΩ (Note 7) tf SCL, SDA Fall Times VCC = VCC2 = VDD(BUS) = 5V, CBUS = 100pF, 20 300 ns RBUS = 10kΩ (Note 7) tIDLE Bus Idle Time l 55 95 175 μs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
VMIN = minimum of VCC and VCC2 if VCC2 > 2.25V, otherwise may cause permanent damage to the device. Exposure to any Absolute VMIN = VCC. Maximum Rating condition for extended periods may affect device
Note 6:
VIL is tested for the following (VCC, VCC2) combinations; reliability and lifetime. (2.9V, 5.5V), (5.5V, 2.25V), (3.3V, 3.3V) and (5V, 0V).
Note 2:
All currents into pins are positive and all voltages are referenced
Note 7:
Guaranteed by design and not tested. to GND unless otherwise indicated.
Note 8:
Measured in a special DC mode with VSDA,SCL = VRTA(TH) + 1V.
Note 3:
The LTC4315 can level translate bus voltages ranging from The transient IRTA during rising edges, when ACC is LOW, will depend on 2.25V to 5.5V. In special cases, it can also level translate down to 1.4V. the bus loading condition and the slew rate of the bus. The LTC4315’s See the Applications Information section for more details. internal slew rate control circuitry limits the maximum bus rise rate to
Note 4:
Test performed with SDA, SCL buffers active. 75V/μs by controlling the transient IRTA. 4315f 4 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS