Datasheet ADXL313 (Analog Devices) - 9

制造商Analog Devices
描述3-Axis, ±0.5 g/±1 g/±2 g/±4 g Digital Accelerometer
页数 / 页29 / 9 — ADXL313. Data Sheet. THEORY OF OPERATION. POWER SAVINGS. Power Modes. …
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ADXL313. Data Sheet. THEORY OF OPERATION. POWER SAVINGS. Power Modes. POWER SEQUENCING. Table 5. Current Consumption vs. Data Rate

ADXL313 Data Sheet THEORY OF OPERATION POWER SAVINGS Power Modes POWER SEQUENCING Table 5 Current Consumption vs Data Rate

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ADXL313 Data Sheet THEORY OF OPERATION
The ADXL313 is a complete 3-axis acceleration measurement
POWER SAVINGS
system with a selectable measurement range of ±0.5 g, ±1 g,
Power Modes
±2 g, or ±4 g. It measures both dynamic acceleration resulting from motion or shock and static acceleration, such as gravity, The ADXL313 automatically modulates its power consumption which allows it to be used as a tilt sensor. in proportion to its output data rate, as outlined in Table 5. If additional power savings are desired, a lower power mode is The sensor is a polysilicon surface-micromachined structure available. In this mode, the internal sampling rate is reduced, built on top of a silicon wafer. Polysilicon springs suspend the allowing for power savings in the 12.5 Hz to 400 Hz data rate structure over the surface of the wafer and provide a resistance range at the expense of slightly greater noise. To enter low against acceleration forces. power mode, set the LOW_POWER bit (Bit 4) in the BW_RATE Deflection of the structure is measured using differential register (Address 0x2C). The current consumption in low power capacitors that consist of independent fixed plates and plates mode is shown in Table 6 for cases where there is an advantage attached to the moving mass. Acceleration deflects the beam to using low power mode. Use of low power mode for a data and unbalances the differential capacitor, resulting in a sensor rate not shown in Table 6 does not provide any advantage over output whose amplitude is proportional to acceleration. Phase- the same data rate in normal power mode. Therefore, it is sensitive demodulation is used to determine the magnitude and recommended that only data rates shown in Table 6 be used in polarity of the acceleration. low power mode. The current consumption values shown in
POWER SEQUENCING
Table 5 and Table 6 are for a VS of 3.3 V. Power can be applied to VS or VDD I/O in any sequence without
Table 5. Current Consumption vs. Data Rate
damaging the ADXL313. All possible power-on modes are
(TA = 25°C, VS = VDD I/O = 3.3 V)
summarized in Table 5. The interface voltage level is set with
Output Data
the interface supply voltage, V
Rate (Hz) Bandwidth (Hz) Rate Code I
DD I/O, which must be present to
DD (µA)
ensure that the ADXL313 does not create a conflict on the 3200 1600 1111 170 communication bus. For single-supply operation, V 1600 800 1110 115 DD I/O can be the same as the main supply, V 800 400 1101 170 S. In a dual-supply application, however, V 400 200 1100 170 DD I/O can differ from VS to accommodate the desired interface voltage, as long as V 200 100 1011 170 S is greater than or equal to VDD I/O. 100 50 1010 170 After VS is applied, the device enters standby mode, where power 50 25 1001 115 consumption is minimized and the device waits for VDD I/O to be 25 12.5 1000 82 applied and for the command to enter measurement mode to be 12.5 6.25 0111 65 received. (This command can be initiated by setting the measure 6.25 3.125 0110 57 bit in the POWER_CTL register (Address 0x2D).) In addition, any register can be written to or read from to configure the part while
Table 6. Current Consumption vs. Data Rate, Low Power Mode
the device is in standby mode. It is recommended that the device
(TA = 25°C, VS = VDD I/O = 3.3 V)
be configured in standby mode before measurement mode is
Output Data
enabled. Clearing the measure bit returns the device to the standby
Rate (Hz) Bandwidth (Hz) Rate Code IDD (µA)
mode. 400 200 1100 115 200 100 1011 82 100 50 1010 65 50 25 1001 57 25 12.5 1000 50 12.5 6.25 0111 43
Table 7. Power Sequencing Condition VS VDD I/O Description
Power Off Off Off The device is completely off, but there is a potential for a communication bus conflict. Bus Disabled On Off The device is on in standby mode, but communication is unavailable, and the device creates a conflict on the communication bus. Minimize the duration of this state during power-up to prevent a conflict. Bus Enabled Off On No functions are available, but the device does not create a conflict on the communication bus. Standby or On On The device is in standby mode, awaiting a command to enter measurement mode, and all sensor Measurement functions are off. After the device is instructed to enter measurement mode, all sensor functions are available. Rev. B | Page 8 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SEQUENCING POWER SAVINGS Power Modes Autosleep Mode Standby Mode SERIAL COMMUNICATIONS SPI I2C INTERRUPTS DATA_READY Activity Inactivity Watermark Overrun FIFO Bypass Mode FIFO Mode Stream Mode Trigger Mode Retrieving Data from FIFO SELF TEST REGISTER MAP REGISTER DEFINITIONS Register 0x00—DEVID_0 (Read Only) Register 0x01—DEVID_1 (Read Only) Register 0x02—PARTID (Read Only) Register 0x03—REVID (Read Only) Register 0x04—XID (Read Only) Register 0x18—SOFT_RESET (Read/Write) Register 0x1E—OFSX (Read/Write), Register 0x1F—OFSY (Read/Write),Register 0x20—OFSZ (Read/Write) Register 0x24—THRESH_ACT (Read/Write) Register 0x25—THRESH_INACT (Read/Write) Register 0x26—TIME_INACT (Read/Write) Register 0x27—ACT_INACT_CTL (Read/Write) ACT_AC/DC and INACT_AC/DC Bits ACT_x and INACT_x Bits Register 0x2C—BW_RATE (Read/Write) LOW_POWER Bit Rate Bits Register 0x2D—POWER_CTL (Read/Write) I2C_Disable Bit Link Bit AUTO_SLEEP Bit Measure Bit Sleep Bit Wake-Up Bits Register 0x2E—INT_ENABLE (Read/Write) Register 0x2F—INT_MAP (Read/Write) Register 0x30—INT_SOURCE (Read Only) Register 0x31—DATA_FORMAT (Read/Write) SELF_TEST Bit SPI Bit INT_INVERT Bit FULL_RES Bit Justify Bit Range Bits Register 0x32 and Register 0x33—DATA_X0, DATA_X1 (Read Only), Register 0x34 and Register 0x35—DATA_Y0, DATA_Y1 (Read Only), Register 0x36 and Register 0x37—DATA_Z0, DATA_Z1 (Read Only) Register 0x38—FIFO_CTL (Read/Write) FIFO_MODE Bits Trigger Bit Samples Bits 0x39—FIFO_STATUS (Read Only) FIFO_TRIG Bit Entries Bits APPLICATIONS INFORMATION POWER SUPPLY DECOUPLING MECHANICAL CONSIDERATIONS FOR MOUNTING THRESHOLD LINK MODE SLEEP MODE vs. LOW POWER MODE USING SELF TEST 3200 Hz AND 1600 Hz ODR DATA FORMATTING AXES OF ACCELERATION SENSITIVITY SOLDER PROFILE OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS