Datasheet ADXL313 (Analog Devices) - 10

Data Sheet ADXL313 Autosleep Mode Standby Mode
Additional power savings can be obtained by having the For even lower power operation, standby mode can be used. ADXL313 automatically switch to sleep mode during periods of In standby mode, current consumption is reduced to 0.1 µA inactivity. To enable this feature, set the THRESH_INACT (typical). In this mode, no measurements are made. Standby register (Address 0x25) to an acceleration threshold value. mode is entered by clearing the measure bit (Bit 3) in the Levels of acceleration below this threshold are regarded as no POWER_CTL register (Address 0x2D). Placing the device into activity. Set TIME_INACT (Address 0x26) to an appropriate standby mode preserves the contents of the FIFO. inactivity time period. Then set the AUTO_SLEEP bit and the link bit in the POWER_CTL register (Address 0x2D). If the device does not detect a level of acceleration in excess of THRESH_INACT for TIME_INACT seconds, the device is transitioned to sleep mode automatically. Current consumption at less than 10 Hz data rates used in this mode is typically 55 µA for a V S of 3.3 V. Rev. B | Page 9 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SEQUENCING POWER SAVINGS Power Modes Autosleep Mode Standby Mode SERIAL COMMUNICATIONS SPI I2C INTERRUPTS DATA_READY Activity Inactivity Watermark Overrun FIFO Bypass Mode FIFO Mode Stream Mode Trigger Mode Retrieving Data from FIFO SELF TEST REGISTER MAP REGISTER DEFINITIONS Register 0x00—DEVID_0 (Read Only) Register 0x01—DEVID_1 (Read Only) Register 0x02—PARTID (Read Only) Register 0x03—REVID (Read Only) Register 0x04—XID (Read Only) Register 0x18—SOFT_RESET (Read/Write) Register 0x1E—OFSX (Read/Write), Register 0x1F—OFSY (Read/Write),Register 0x20—OFSZ (Read/Write) Register 0x24—THRESH_ACT (Read/Write) Register 0x25—THRESH_INACT (Read/Write) Register 0x26—TIME_INACT (Read/Write) Register 0x27—ACT_INACT_CTL (Read/Write) ACT_AC/DC and INACT_AC/DC Bits ACT_x and INACT_x Bits Register 0x2C—BW_RATE (Read/Write) LOW_POWER Bit Rate Bits Register 0x2D—POWER_CTL (Read/Write) I2C_Disable Bit Link Bit AUTO_SLEEP Bit Measure Bit Sleep Bit Wake-Up Bits Register 0x2E—INT_ENABLE (Read/Write) Register 0x2F—INT_MAP (Read/Write) Register 0x30—INT_SOURCE (Read Only) Register 0x31—DATA_FORMAT (Read/Write) SELF_TEST Bit SPI Bit INT_INVERT Bit FULL_RES Bit Justify Bit Range Bits Register 0x32 and Register 0x33—DATA_X0, DATA_X1 (Read Only), Register 0x34 and Register 0x35—DATA_Y0, DATA_Y1 (Read Only), Register 0x36 and Register 0x37—DATA_Z0, DATA_Z1 (Read Only) Register 0x38—FIFO_CTL (Read/Write) FIFO_MODE Bits Trigger Bit Samples Bits 0x39—FIFO_STATUS (Read Only) FIFO_TRIG Bit Entries Bits APPLICATIONS INFORMATION POWER SUPPLY DECOUPLING MECHANICAL CONSIDERATIONS FOR MOUNTING THRESHOLD LINK MODE SLEEP MODE vs. LOW POWER MODE USING SELF TEST 3200 Hz AND 1600 Hz ODR DATA FORMATTING AXES OF ACCELERATION SENSITIVITY SOLDER PROFILE OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS