link to page 1 link to page 1 link to page 1 link to page 1 link to page 3 link to page 4 link to page 6 link to page 6 link to page 6 link to page 7 link to page 8 link to page 11 link to page 11 link to page 11 link to page 13 link to page 13 link to page 16 link to page 18 link to page 19 link to page 20 link to page 22 link to page 26 link to page 26 link to page 26 link to page 26 link to page 26 link to page 26 link to page 27 link to page 28 link to page 29 link to page 30 link to page 31 link to page 33 link to page 33 ADXL312Data SheetTABLE OF CONTENTS Features .. 1 FIFO ... 18 Applications ... 1 Self-Test ... 19 General Description ... 1 Register Map ... 20 Functional Block Diagram .. 1 Register Definitions ... 21 Revision History ... 2 Applications Information .. 25 Specifications ... 3 Power Supply Decoupling ... 25 Absolute Maximum Ratings .. 5 Mechanical Considerations for Mounting .. 25 Thermal Resistance .. 5 Threshold .. 25 ESD Caution .. 5 Link Mode ... 25 Pin Configuration and Function Descriptions ... 6 Sleep Mode vs. Low Power Mode... 25 Typical Performance Characteristics ... 7 Using Self-Test .. 26 Theory of Operation .. 10 Data Formatting of Upper Data Rates ... 27 Power Sequencing .. 10 Noise Performance ... 28 Power Savings.. 10 Axes of Acceleration Sensitivity ... 29 Serial Communications ... 12 Solder Profile ... 30 SPI ... 12 Outline Dimensions ... 31 I2C ... 15 Ordering Guide .. 32 Interrupts ... 17 Automotive Products ... 32 REVISION HISTORY 4/2017—Rev. A to Rev. B Added Serial Port I/O Default States Section ... 12 Changes to Standby Mode Leakage Current Parameter, Table 1 . ... 3 Added Preventing Bus Traffic Errors Section and Figure 23; Updated Outline Dimensions ... 31 Renumbered Sequential y ... 13 Changes to Ordering Guide .. 32 Changes to FIFO Section ... 18 Changes to Figure 41 .. 31 7/2015—Rev. 0 to Rev. A Changes to Features Section.. 1 12/2010—Revision 0: Initial Version Changes to Pin 22 Description, Table 4 ... 6 Changes to Serial Communications Section, SPI Section, Figure 21, and Figure 22 .. 12 Rev. B | Page 2 of 32 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Sequencing Power Savings Power Modes Autosleep Mode Standby Mode Serial Communications Serial Port I/O Default states SPI Preventing Bus Traffic Errors I2C Interrupts DATA_READY Activity Inactivity Watermark Overrun FIFO Bypass Mode FIFO Mode Stream Mode Trigger Mode Retrieving Data from FIFO Self-Test Register Map Register Definitions Register 0x00—DEVID (Read Only) Register 0x1E, Register 0x1F, Register 0x20—OFSX, OFSY, OFSZ (Read/Write) Register 0x24—THRESH_ACT (Read/Write) Register 0x25—THRESH_INACT (Read/Write) Register 0x26—TIME_INACT (Read/Write) Register 0x27—ACT_INACT_CTL (Read/Write) ACT AC/DC and INACT AC/DC Bits ACT_x Enable Bits and INACT_x Enable Bits Register 0x2C—BW_RATE (Read/Write) LOW_POWER Bit Rate Bits Register 0x2D—POWER_CTL (Read/Write) Link Bit AUTO_SLEEP Bit Measure Bit Sleep Bit Wake-Up Bits Register 0x2E—INT_ENABLE (Read/Write) Register 0x2F—INT_MAP (Read/Write) Register 0x30—INT_SOURCE (Read Only) Register 0x31—DATA_FORMAT (Read/Write) SELF_TEST Bit SPI Bit INT_INVERT Bit FULL_RES Bit Justify Bit Range Bits Register 0x32 to Register 0x37—DATAX0, DATAX1, DATAY0, DATAY1, DATAZ0, DATAZ1 (Read Only) Register 0x38—FIFO_CTL (Read/Write) FIFO_MODE Bits Trigger Bit Samples Bits 0x39—FIFO_STATUS (Read Only) FIFO_TRIG Bit Entries Bits Applications Information Power Supply Decoupling Mechanical Considerations for Mounting Threshold Link Mode Sleep Mode vs. Low Power Mode Using Self-Test Data Formatting of Upper Data Rates Noise Performance Axes of Acceleration Sensitivity Solder Profile Outline Dimensions Ordering Guide Automotive Products