Datasheet AD7740 (Analog Devices) - 9

AD7740 Clock Generation Reference Input
As distinct from the asynchronous VFCs that rely on the The AD7740 performs conversions relative to the applied refer- stability of an external capacitor to set their full-scale frequency, ence voltage. This reference may be taken from the internal 2.5 V the AD7740 uses an external clock to define the full-scale output bandgap reference by leaving REFIN/OUT unconnected. Alterna- frequency. The result is a more stable transfer function, which tively an external precision reference may be used. This is allows the designer to determine the system stability and drift connected to the REFIN/OUT pin, overdriving the internal based upon the selected external clock. reference. Drive capability, initial error, noise, and drift charac- The AD7740 requires a master clock input, which may be an teristics should be considered when selecting an external refer- external CMOS-compatible clock signal applied to the CLKIN ence. The AD780 and REF192 are suitable choices for external pin (CLKOUT not used). For a frequency of 1 MHz, a crystal references. or resonator can be connected between CLKIN and CLKOUT The internal reference is most suited to applications where so that the clock circuit functions as a crystal controlled oscilla- ratiometric operation of the signal source is possible. Using the tor. Figure 7 shows a simple model of this. internal reference in systems where the signal source varies with time, temperature, loading, etc., tends to cancel out errors.
ON-CHIP Power-Down Mode CIRCUITRY
When CLKIN is inactive low for 1 ms (typ), the AD7740 auto-
5M
matically enters a power-down mode. In this mode most of the digital and analog circuitry is shut down and REFOUT floats.
CLKIN CLKOUT
FOUT goes high. This reduces the power consumption to 525 µW
OFF-CHIP CIRCUITRY
max (5 V) and 360 µW (3.3 V).
C1 C2 APPLICATIONS
Figure 7. On-Chip Oscillator The basic connection diagram for the part is shown in Figure 8. Using the part with a crystal or ceramic resonator between the In the connection diagram shown, the AD7740 is configured in CLKIN and CLKOUT pins generally causes more current to unbuffered mode. The 5 V power supply is used as a reference to be drawn from VDD than when the part is clocked from a driven the AD7740. A quartz crystal provides the master clock source clock signal at the CLKIN pin. This is because the on-chip for the part. It may be necessary to connect capacitors (C1 and oscillator is active in the case of the crystal or resonator. The C2 in the diagram) to the crystal to ensure that it does not oscil- amount of additional current depends on a number of factors. late at overtones of its fundamental operating frequency. The First, the larger the value of the capacitor on CLKIN and values of capacitors will vary depending on the manufacturer’s CLKOUT pins, the larger the current consumption. Typical specifications. values recommended by the crystal and resonator manufacturers are in the range of 30 pF to 50 pF. Another factor that influ-
5V
ences IDD is Effective Series Resistance of the crystal (ESR).
0.1 F 10 F
The lower the ESR value, the lower the current taken by the oscillator circuit.
VDD
The on-chip oscillator also has a start-up time associated with it
REFIN
before it oscillates at its correct frequency and voltage levels. The typical start-up time is 10 ms with a V
FOUT
DD of 5 V and 15 ms with
VIN
a VDD of 3.3 V (both with a 1 MHz crystal).
GND AD7740
The AD7740 master clock appears inverted on the CLKOUT
BUF
pin of the device. The maximum recommended load on this pin is
CLKIN CLKOUT
one CMOS load. When using a crystal to generate the AD7740’s clock it may be desirable to then use this clock as the clock source for the entire system. In this case, it is recommended that
C1 C2
the CLKOUT signal be buffered with a CMOS buffer before being applied to the rest of the circuit (as shown in Figure 7). Figure 8. Basic Connection Diagram –8– REV. C