Datasheet ADXRS453 (Analog Devices) - 9

ADXRS453 Data Sheet 30 45 40 25 ) ) % 35 ( (% N N IO 20 IO T 30 A AT L UL PU 25 P O 15 O P P F F 20 O O T 10 NT 15 EN C RCE E 10 PER P 5 5 0 0
2 5
–3 –2 –1 0 1 2 3 –3 –2 –1 0 1 2 3
-01 -01 55 155
ERROR (%) ERROR (%)
091 09 Figure 11. SOIC_CAV Sensitivity Drift over Temperature Figure 14. LCC_V Sensitivity Drift over Temperature
1 1 °/sec) °/sec) ( 0.1 ( 0.1 NCE NCE A A ARI ARI N V N V A A L L 0.01 AL 0.01 AL T T O O RO RO 0.001 0.001 1 1 1 0 1 1 1 0 01 01 0. 10 01 10 100 01 0. 100 000 100 00001 000 0.001 0. 100
13
00001 0.001 0.
16
0000 0.
0
0000 0.
0
0000001
5-
0.
5-
0. 0. 0000001 0. 0. AVERAGING TIME (Hours)
915
0. AVERAGING TIME (Hours)
915 0 0 Figure 12. Typical Root Allan Variance at 40°C Figure 15. Typical Root Allan Variance at 105°C
3 3 2 2 1 1 °/sec) ) T ( % U 0 R ( 0 TP U RRO E LL O U –1 –1 N –2 –2 –3 –3 –50 –30 –10 10 30 50 70 90 110 130
014
–50 –30 –10 10 30 50 70 90 110 130
017 55- 55-
TEMPERATURE (°C) TEMPERATURE (°C)
091 091 Figure 13. Null Output over Temperature, 16 Devices Soldered on PCB Figure 16. Sensitivity over Temperature, 16 Devices Soldered on PCB Rev. B | Page 8 of 32 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings Thermal Resistance Rate Sensitive Axis ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Continuous Self-Test Mechanical Performance Noise Performance Applications Information Calibrated Performance Mechanical Considerations for Mounting Application Circuits ADXRS453 Signal Chain Timing SPI Communication Protocol Command/Response Device Data Latching SPI Timing Characteristics Command/Response Bit Definitions SQ2 to SQ0 Bits SM2 to SM0 Bits A8 to A0 Bits D15 to D0 Bits P Bit SPI Bit RE Bit DU Bit ST1 and ST0 Bits P0 Bit P1 Bit Fault Register Bit Definitions Fail Bit AMP Bit OV Bit UV Bit PLL Bit Q Bit NVM Bit POR Bit PWR Bit CST Bit CHK Bit Recommended Start-Up Sequence with CHK Bit Assertion Rate Data Format Memory Map and Registers Memory Map Memory Register Definitions Rate (RATEx) Registers Temperature (TEMx) Registers Low CST (LOCSTx) Registers High CST (HICSTx) Registers Quad Memory (QUADx) Registers Fault (FAULTx) Registers Part ID (PIDx) Registers Serial Number (SNx) Registers Package Orientation and Layout Information Solder Profile Package Marking Codes Outline Dimensions Ordering Guide