Datasheet LT1680 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | High Power DC/DC Step-Up Controller |
| 页数 / 页 | 16 / 7 — PI FU CTIO S. RUN/SHDN (Pin 11):. GATE (Pin 13):. 12V. IN (Pin 14):. SYNC … |
| 文件格式/大小 | PDF / 228 Kb |
| 文件语言 | 英语 |
PI FU CTIO S. RUN/SHDN (Pin 11):. GATE (Pin 13):. 12V. IN (Pin 14):. SYNC (Pin 15):. PGND (Pin 12):. 5VREF (Pin 16):. BLOCK DIAGRA
该数据表的模型线
文件文字版本
LT1680
U U U PI FU CTIO S RUN/SHDN (Pin 11):
Precision Referenced Shutdown.
GATE (Pin 13):
Driver Output. Connect to gate of external Can be used as logic level input for shutdown control or power FET switch. as an analog monitor for input supply undervoltage
12V
protection, etc. IC is enabled when RUN/SHDN pin rising
IN (Pin 14):
12V Power Supply Input. Bypass with at least 1µF to PGND. edge exceeds 1.25V. 25mV of hysteresis helps assure stable mode switching. All internal functions are disabled
SYNC (Pin 15):
Oscillator Synchronization Pin with in shutdown mode. If this function is not desired, connect TTL-Level Compatible Input. Input drives internal rising RUN/SHDN to 12V edge triggered one shot; SYNC signal on/off times should IN (typically through a 100k resistor). See Applications Information. be ≥1µs (10% to 90% duty cycle at 100kHz). Does not contain internal pull-up. Connect to SGND if not used.
PGND (Pin 12):
Power Ground. References the output switch and internal driver control circuits. Connect with
5VREF (Pin 16):
5V Reference Output. Allows connection low impedance trace to V of external loads up to 10mA DC. Reference is not available IN decoupling capacitor negative (ground) terminal. during shutdown. Typically bypassed with at least 1µF capacitor to SGND.
W BLOCK DIAGRA
SYNC GATE REFERENCE ONE SHOT Q 5VREF VIN 5V – R 1.25V S R UVLO SENSE CIRCUIT RCT OSC CT CCT VOUT + SL/ADJ SENSE + + ×15 SENSE – V – C + IC1 CURRENT – SENSE AMPLIFIER I V AVG REF VOUT + + EA VFB – 2.5V – 12VIN 12V 0.5µA SS 8µA PGND SOFT START 1.25V – CIRCUIT ENABLE RUN/SHDN RUN SHDN + SGND 1680 BD 7
U U U PI FU CTIO S RUN/SHDN (Pin 11):
Precision Referenced Shutdown.
GATE (Pin 13):
Driver Output. Connect to gate of external Can be used as logic level input for shutdown control or power FET switch. as an analog monitor for input supply undervoltage
12V
protection, etc. IC is enabled when RUN/SHDN pin rising
IN (Pin 14):
12V Power Supply Input. Bypass with at least 1µF to PGND. edge exceeds 1.25V. 25mV of hysteresis helps assure stable mode switching. All internal functions are disabled
SYNC (Pin 15):
Oscillator Synchronization Pin with in shutdown mode. If this function is not desired, connect TTL-Level Compatible Input. Input drives internal rising RUN/SHDN to 12V edge triggered one shot; SYNC signal on/off times should IN (typically through a 100k resistor). See Applications Information. be ≥1µs (10% to 90% duty cycle at 100kHz). Does not contain internal pull-up. Connect to SGND if not used.
PGND (Pin 12):
Power Ground. References the output switch and internal driver control circuits. Connect with
5VREF (Pin 16):
5V Reference Output. Allows connection low impedance trace to V of external loads up to 10mA DC. Reference is not available IN decoupling capacitor negative (ground) terminal. during shutdown. Typically bypassed with at least 1µF capacitor to SGND.
W BLOCK DIAGRA
SYNC GATE REFERENCE ONE SHOT Q 5VREF VIN 5V – R 1.25V S R UVLO SENSE CIRCUIT RCT OSC CT CCT VOUT + SL/ADJ SENSE + + ×15 SENSE – V – C + IC1 CURRENT – SENSE AMPLIFIER I V AVG REF VOUT + + EA VFB – 2.5V – 12VIN 12V 0.5µA SS 8µA PGND SOFT START 1.25V – CIRCUIT ENABLE RUN/SHDN RUN SHDN + SGND 1680 BD 7