Datasheet ATtiny11, ATtiny12 - Summary (Atmel) - 3
| 制造商 | Atmel |
| 描述 | 8-bit AVR Microcontroller with 1K Byte Flash |
| 页数 / 页 | 15 / 3 — ATtiny11/12. ATtiny11 Block Diagram. Figure 1 |
| 文件格式/大小 | PDF / 235 Kb |
| 文件语言 | 英语 |
ATtiny11/12. ATtiny11 Block Diagram. Figure 1
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文件文字版本
ATtiny11/12 ATtiny11 Block Diagram
See Figure 1 on page 3. The ATtiny11 provides the following features: 1K bytes of Flash, up to five general-purpose I/O lines, one input line, 32 general-purpose working registers, an 8-bit timer/counter, internal and external interrupts, programmable Watch- dog Timer with internal oscillator, and two software-selectable power-saving modes. The Idle Mode stops the CPU while allowing the timer/counters and interrupt system to continue functioning. The Power-down Mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. The wake-up or interrupt on pin change features enable the ATtiny11 to be highly responsive to external events, still featuring the lowest power consumption while in the power-down modes. The device is manufactured using Atmel’s high-density nonvolatile memory technology. By combining an RISC 8-bit CPU with Flash on a monolithic chip, the Atmel ATtiny11 is a powerful microcontroller that provides a highly-flexible and cost-effective solution to many embedded control applications.
Figure 1.
The ATtiny11 Block Diagram VCC 8-BIT DATA BUS INTERNAL OSCILLATOR GND PROGRAM STACK WATCHDOG TIMING AND COUNTER POINTER TIMER CONTROL PROGRAM HARDWARE MCU CONTROL FLASH STACK REGISTER INSTRUCTION MCU STATUS REGISTER REGISTER GENERAL- PURPOSE REGISTERS INSTRUCTION TIMER/ DECODER Z COUNTER CONTROL INTERRUPT ALU LINES UNIT STATUS REGISTER PROGRAMMING OSCILLATORS LOGIC R O T DATA REGISTER DATA DIR. + - PORTB REG. PORTB ARA ANALOG COMP PORTB DRIVERS PB0-PB5
3
1006FS–AVR–06/07 Document Outline Features Pin Configuration Overview ATtiny11 Block Diagram ATtiny12 Block Diagram Pin Descriptions VCC GND Port B (PB5..PB0) XTAL1 XTAL2 RESET Register Summary ATtiny11 Register Summary ATtiny12 Instruction Set Summary Ordering Information ATtiny11 ATtiny12 Packaging Information 8P3 8S2 Datasheet Revision History Rev. 1006F-06/07 Rev. 1006E-07/06 Rev. 1006D-07/03 Rev. 1006C-09/01
See Figure 1 on page 3. The ATtiny11 provides the following features: 1K bytes of Flash, up to five general-purpose I/O lines, one input line, 32 general-purpose working registers, an 8-bit timer/counter, internal and external interrupts, programmable Watch- dog Timer with internal oscillator, and two software-selectable power-saving modes. The Idle Mode stops the CPU while allowing the timer/counters and interrupt system to continue functioning. The Power-down Mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. The wake-up or interrupt on pin change features enable the ATtiny11 to be highly responsive to external events, still featuring the lowest power consumption while in the power-down modes. The device is manufactured using Atmel’s high-density nonvolatile memory technology. By combining an RISC 8-bit CPU with Flash on a monolithic chip, the Atmel ATtiny11 is a powerful microcontroller that provides a highly-flexible and cost-effective solution to many embedded control applications.
Figure 1.
The ATtiny11 Block Diagram VCC 8-BIT DATA BUS INTERNAL OSCILLATOR GND PROGRAM STACK WATCHDOG TIMING AND COUNTER POINTER TIMER CONTROL PROGRAM HARDWARE MCU CONTROL FLASH STACK REGISTER INSTRUCTION MCU STATUS REGISTER REGISTER GENERAL- PURPOSE REGISTERS INSTRUCTION TIMER/ DECODER Z COUNTER CONTROL INTERRUPT ALU LINES UNIT STATUS REGISTER PROGRAMMING OSCILLATORS LOGIC R O T DATA REGISTER DATA DIR. + - PORTB REG. PORTB ARA ANALOG COMP PORTB DRIVERS PB0-PB5
3
1006FS–AVR–06/07 Document Outline Features Pin Configuration Overview ATtiny11 Block Diagram ATtiny12 Block Diagram Pin Descriptions VCC GND Port B (PB5..PB0) XTAL1 XTAL2 RESET Register Summary ATtiny11 Register Summary ATtiny12 Instruction Set Summary Ordering Information ATtiny11 ATtiny12 Packaging Information 8P3 8S2 Datasheet Revision History Rev. 1006F-06/07 Rev. 1006E-07/06 Rev. 1006D-07/03 Rev. 1006C-09/01