LTC4162-S TIMING DIAGRAM SDA tSU(DAT) tBUF t t t HD(DAT) SU(STA) LOW t t HD(STA) SU(STO) SCL tHD(STA) tf tf tSP tHIGH START REPEATED START STOP START CONDITION CONDITION CONDITION CONDITION 4162 TD I2C SMBus Legend S START CONDITION Sr REPEATED START CONDITION Rd READ (BIT VALUE OF 1) Wr WRITE (BIT VALUE OF 0) A ACKNOWLEDGE N NACK P STOP CONDITION PEC* PACKET ERROR CODE MASTER TO SLAVE SLAVE TO MASTER SMBus WRITE WORD PROTOCOL S SLAVE ADDRESS Wr A COMMAND CODE A DATA BYTE LOW A DATA BYTE HIGH A P SMBus WRITE WORD WITH PEC PROTOCOL S SLAVE ADDRESS Wr A COMMAND CODE A DATA BYTE LOW A DATA BYTE HIGH A PEC* A P SMBus READ WORD PROTOCOL S SLAVE ADDRESS Wr A COMMAND CODE A Sr SLAVE ADDRESS Rd A DATA BYTE LOW A DATA BYTE HIGH N P SMBus READ WORD WITH PEC PROTOCOL S SLAVE ADDRESS Wr A COMMAND CODE A Sr SLAVE ADDRESS Rd A DATA BYTE LOW A DATA BYTE HIGH A PEC* N P SMBus ALERT RESPONSE ADDRESS PROTOCOL S ALERT RESPONSE ADDRESS Rd A DEVICE ADDRESS Rd N P SMBus ALERT RESPONSE ADDRESS PROTOCOL WITH PEC S ALERT RESPONSE ADDRESS Rd A DEVICE ADDRESS Rd A PEC* N P *USE OF PACKET ERROR CHECKING IS OPTIONAL Rev 0 14 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram ESD Diagram Timing Diagram Operation Applications Information Register Descriptions Typical Applications Package Description Typical Application Related Parts