Datasheet ADE7763 (Analog Devices) - 10

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ADE7763 Data Sheet Pin No. Mnemonic Description
14 IRQ Interrupt Request Output. This is an active low, open-drain logic output. Maskable interrupts include active energy register rollover, active energy register at half level, and arrivals of new waveform samples—see the Interrupts section. 15 CLKIN Master Clock for ADCs and Digital Signal Processing. An external clock can be provided at this logic input. Alternatively, a parallel resonant AT crystal can be connected across CLKIN and CLKOUT to provide a clock source for the ADE7763. The clock frequency for specified operation is 3.579545 MHz. Ceramic load capacitors between 22 pF and 33 pF should be used with the gate oscillator circuit. Refer to the crystal manufacturer’s data sheet for load capacitance requirements. 16 CLKOUT A crystal can be connected across this pin and CLKIN, as described for Pin 15, to provide a clock source for the ADE7763. The CLKOUT pin can drive one CMOS load when either an external clock is supplied at CLKIN or a crystal is being used. 17 CS Chip Select1. Part of the 4-wire SPI serial interface. This active low logic input allows the ADE7763 to share the serial bus with several other devices—see the Serial Interface section. 18 SCLK Serial Clock Input for the Synchronous Serial Interface1. All serial data transfers are synchronized to this clock—see the Serial Interface section. The SCLK has a Schmitt-trigger input for use with a clock source that has a slow edge transition time, such as an opto-isolator output. 19 DOUT Data Output for the Serial Interface. Data is shifted out at this pin upon the rising edge of SCLK. This logic output is normally in a high impedance state, unless it is driving data onto the serial data bus—see the Serial Interface section. 20 DIN Data Input for the Serial Interface. Data is shifted in at this pin upon the falling edge of SCLK—see the Serial Interface section. 1 It is recommended to drive the RESET, SCLK, and CS pins with either a push-pull without an external series resistor or with an open-collector with a 10 kΩ pull-up Pull- down resistors are not recommended because under some conditions, they may interact with internal circuitry. Rev. C | Page 10 of 56 Document Outline Features General Description Functional Block Diagram Revision History Specifications Timing Characteristics Absolute Maximum Ratings ESD Caution Terminology Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Analog Inputs di/dt Current Sensor and Digital Integrator Zero-Crossing Detection Zero-Crossing Timeout Period Measurement Power Supply Monitor Line Voltage Sag Detection Sag Level Set Peak Detection Peak Level Set Peak Level Record Interrupts Using Interrupts with an MCU Interrupt Timing Temperature Measurement Analog-to-Digital Conversion Antialias Filter ADC Transfer Function Reference Circuit Channel 1 ADC Channel 1 Sampling Channel 1 RMS Calculation Channel 1 RMS Offset Compensation Channel 2 ADC Channel 2 Sampling Channel 2 RMS Calculation Channel 2 RMS Offset Compensation Phase Compensation Active Power Calculation Energy Calculation Integration Time under Steady Load Power Offset Calibration Energy-to-Frequency Conversion Line Cycle Energy Accumulation Mode Positive-Only Accumulation Mode No-Load Threshold Apparent Power Calculation Apparent Power Offset Calibration Apparent Energy Calculation Integration Times under Steady Load Line Apparent Energy Accumulation Energies Scaling Calibrating an Energy Meter Watt Gain Calibrating Watt Gain Using a Reference Meter Example Calibrating Watt Gain Using an Accurate Source Example Watt Offset Calibrating Watt Offset Using a Reference Meter Example Calibrating Watt Offset with an Accurate Source Example Phase Calibration Calibrating Phase Using a Reference Meter Example Calibrating Phase with an Accurate Source Example VRMS and IRMS Calibration Apparent Energy CLKIN Frequency Suspending Functionality Checksum Register Serial Interface ADE7763 Serial Write Operation Serial Read Operation Registers Register Descriptions Communication Register Mode Register (0x09) Outline Dimensions Ordering Guide CH1OS Register (0x0D) Outline Dimensions Ordering Guide