Datasheet ADE7751 (Analog Devices) - 3

制造商Analog Devices
描述Energy Metering IC with On-Chip Fault Detection
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ADE7751. Parameter. Value. Unit. Test Conditions/Comments. (AV. TIMING CHARACTERISTICS1, 2. DD = DVDD = 5 V

ADE7751 Parameter Value Unit Test Conditions/Comments (AV TIMING CHARACTERISTICS1, 2 DD = DVDD = 5 V

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ADE7751 Parameter Value Unit Test Conditions/Comments
LOGIC OUTPUTS4 F1 and F2 Output High Voltage, VOH ISOURCE = 10 mA 4.5 V min DVDD = 5 V Output Low Voltage, VOL ISINK = 10 mA 0.5 V max DVDD = 5 V CF, FAULT, and REVP Output High Voltage, VOH ISOURCE = 5 mA 4 V min DVDD = 5 V Output Low Voltage, VOL ISINK = 5 mA 0.5 V max DVDD = 5 V POWER SUPPLY For Specified Performance AVDD 4.75 V min 5 V – 5% 5.25 V max 5 V + 5% DVDD 4.75 V min 5 V – 5% 5.25 V max 5 V + 5% AIDD 3 mA max Typically 2 mA DIDD 2.5 mA max Typically 1.5 mA NOTES 1See Terminology section for explanation of specifications. 2See plots in Typical Performance Characteristics graphs. 3See Fault Detection section of data sheet for explanation of fault detection functionality. 4Sample tested during initial release and after any redesign or process change that may affect this parameter. Specifications subject to change without notice.
(AV TIMING CHARACTERISTICS1, 2 DD = DVDD = 5 V

5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58 MHz, TMIN to TMAX = –40

C to +85

C.) Parameter Value Unit Test Conditions/Comments
t 3 1 275 ms F1 and F2 Pulsewidth (Logic Low) t2 See Table III sec Output Pulse Period. See Transfer Function section. t3 1/2 t2 sec Time Between F1 Falling Edge and F2 Falling Edge t 3 4 90 ms CF Pulsewidth (Logic High) t5 See Table IV sec CF Pulse Period. See Transfer Function section. t6 CLKIN/4 sec Minimum Time Between F1 and F2 Pulse NOTES 1Sample tested during initial release and after any redesign or process change that may affect this parameter. 2See Figure 1. 3The pulsewidths of F1, F2, and CF are not fixed for higher output frequencies. See Frequency Outputs F1 and F2 section. Specifications subject to change without notice.
t1 F1 .t6 .t2 F2 .t3 t .t 4 5 CF
Figure 1. Timing Diagram for Frequency Outputs REV. 0 –3–