AD8370Data Sheet0120–10110HD2 RL = 100 Ω 100–20HD3 RL = 100 Ω 90–3080–4070–50HDPSRR (dB)3 RL = 1k Ω 60–6050–70HARMONIC DISTORTION (dBc)40HD2 RL = 1k Ω –8030–90 03692-020 20 03692-023 0501001502002503003504001101001000FREQUENCY (MHz)FREQUENCY (MHz) Figure 22. Harmonic Distortion vs. Frequency at Maximum Gain, Figure 25. Power Supply Rejection Ratio vs. Frequency at Maximum Gain VOUT = 2 V p-p Composite Differential 120800FORWARD TRANSMISSION, HG010060–20FORWARD TRANSMISSION, LG0)80)–40 Ω 40 Ω 6020–60RESISTANCE (ISOLATION (dB)400REACTANCE (j–8016 DIFFERENT GAIN20CODES REPRESENTED–20–100FORWARD TRANSMISSION, PWUP LOWR+jX FORMATREVERSE TRANSMISSION, HG1270–40 03692-021 –120 03692-024 0100200300400500600700101001000FREQUENCY (MHz)FREQUENCY (MHz) Figure 23. Output Resistance and Reactance vs. Frequency Figure 26. Various Forms of Isolation vs. Frequency 8601400RL = 1k Ω 8401300HIGH GAIN MODE820120080011007801000RL = 100 Ω 760900GROUP DELAY (ps)LOW GAIN MODEGROUP DELAY (ps)740800720700700 03692-022 600 03692-025 0102030405060708090100 110 120 1300100200300400500600700800900GAIN CODEFREQUENCY (MHz) Figure 24. Group Delay vs. Gain Code at 70 MHz Figure 27. Group Delay vs. Frequency at Maximum Gain Rev. B | Page 10 of 28 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Block Architecture Preamplifier Transconductance Stage Output Amplifier Digital Interface and Timing Applications Basic Connections Gain Codes Power-Up Feature Choosing Between Gain Ranges Layout and Operating Considerations Package Considerations Single-Ended-to-Differential Conversion DC-Coupled Operation ADC Interfacing 3 V Operation Evaluation Board and Software Appendix Characterization Equipment Composite Waveform Assumption Definitions of Selected Parameters Outline Dimensions Ordering Guide