AD8369ABSOLUTE MAXIMUM RATINGS * Table I. Typical Voltage Gain vs. Gain Code (VS = 5 V, f = 70 MHz) Supply Voltage VS, VPOS . 5.5 V PWUP . V TypicalTypical S + 200 mV BIT0, BIT1, BIT2, BIT3, DENB, SENB . V GainGain (dB)Gain (dB) S + 200 mV Input Voltage, V CodeBIT3 BIT2 BIT1 BIT0 RL = 1 k ⍀ RL = 200 ⍀ INHI – VINLO . 4 V Input Voltage, VINHI or VINLO with respect to COMM . 4.5 V 0 0 0 0 0 –5 –10 Input Voltage, VINHI – VINLO with respect to COMM 1 0 0 0 1 –2 –7 . COMM – 200 mV 2 0 0 1 0 1 –4 Internal Power Dissipation . 265 mW 3 0 0 1 1 4 –1 JA . .121.48°C/W 4 0 1 0 0 7 2 Maximum Junction Temperature . 125rC 5 0 1 0 1 10 5 Operating Temperature Range . –40rC to +85rC 6 0 1 1 0 13 8 Storage Temperature Range . –65rC to +150rC 7 0 1 1 1 16 11 Lead Temperature Range (soldering 60 sec) . to 300rC 8 1 0 0 0 19 14 *Stresses above those listed under Absolute Maximum Ratings may cause perma- 9 1 0 0 1 22 17 nent damage to the device. This is a stress rating only; functional operation of the 10 1 0 1 0 25 20 device at these or any other condition s above those indicated in the operational 11 1 0 1 1 28 23 section of this specification is not implied. Exposure to absolute maximum rating 12 1 1 0 0 31 26 conditions for extended periods may affect device reliability. 13 1 1 0 1 34 29 14 1 1 1 0 37 32 15 1 1 1 1 40 35 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8369 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. A –5– Document Outline Features Applications Functional Block Diagram Product Description Specifications Timing Specifications Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Theroy of Operation Input Attentuator and Output 3 dB Step Fixed Gain Amplifier Input and Output Interfaces Noise and Distortion Offset Control Loop Digital Control Basic Connections Input-Output Interface Reducing Gain Sensitivity to Input and Output Impedance Variation Operation from a Single-Sided Source Interfacing to an ADC PCB Layout Considerations Evaluation Board Evaluation Board Software Appendix Characterization Equipment Definitions of Selected Parameters Composite Waveform Assumption Outline Dimensions Ordering Guide Revision History