Datasheet ADP5014 (Analog Devices) - 4

ADP5014 Data Sheet SPECIFICATIONS
VIN = 5 V, TJ = −40°C to +125°C for minimum and maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
INPUT SUPPLY VOLTAGE RANGE VIN 2.75 6.0 V AVIN, PVIN1, PVIN2, PVIN3, PVIN4 pins QUIESCENT CURRENT AVIN, PVIN1, PVIN2, PVIN3, PVIN4 pins Operating Quiescent Current IQ 5.4 7.0 mA No switching, all ENx pins high Shutdown Current ISHDN 47 85 μA All ENx pins low UNDERVOLTAGE LOCKOUT UVLO AVIN, PVIN1, PVIN2, PVIN3, PVIN4 pins Threshold, Rising VUVLO-RISING 2.65 2.75 V Threshold, Falling VUVLO-FALLING 2.30 2.40 V Hysteresis VHYS 0.25 V REFERENCE Output Voltage VREF 2.0 V Accuracy −1.0 +1.0 % Maximum Load 1 mA OSCILLATOR CIRCUIT Switching Frequency Range 500 2500 kHz Switching Frequency fSW 1000 1200 1400 kHz RRT = 82.5 kΩ Sync Input Input Clock Range fSYNC 500 2500 kHz Input Clock Pulse Width Minimum On Time tSYNC_MIN_ON 100 ns Minimum Off Time tSYNC_MIN_OFF 100 ns Input Clock High Voltage VH(SYNC) 1.3 V Input Clock Low Voltage VL(SYNC) 0.4 V Sync Output Clock Frequency fCLK fSW kHz Positive Pulse Duty Cycle tCLK_PULSE_DUTY 50 % Rise or Fall Time tCLK_RISE_FALL 10 ns High Level Voltage VH(SYNC_OUT) VAVIN V PRECISION ENABLING EN1, EN2, EN3, EN4 pins High Level Threshold VTH_H(EN) 0.6 0.65 V Low Level Threshold VTH_L(EN) 0.52 0.57 V Source Current ITH_L(EN) 4 μA Below the falling threshold DELAY TIMER Programmable Delay Timer Range tDELAY 6 48 ms Delay Timer tDELAY 6 ms Timer ×1 option 48 ms Timer ×8 option POWER GOOD Internal Power-Good Rising Threshold VPWRGD(RISE) 87 90 93 % Internal Power-Good Hysteresis VPWRGD(HYS) 3 % Internal Power-Good Falling Delay tPWRGD_FALL 50 μs Rising Delay for PWRGD Pin tPWRGD_PIN_RISE 2 ms Timer ×1 option 16 ms Timer ×8 option Leakage Current for PWRGD Pin IPWRGD_LEAKAGE 0.1 1 μA Output Low Voltage for PWRGD Pin VPWRGD_LOW 70 150 mV IPWRGD = 1 mA Rev. 0 | Page 4 of 34 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode FPWM and Automatic PWM/PSM Modes LOW NOISE ARCHITECTURE INTERNAL REFERENCE (VREF) ADJUSTABLE OUTPUT VOLTAGE FUNCTION CONFIGURATIONS (CFG1 AND CFG2) PARALLEL OPERATION MANUAL/SEQUENCE MODE Manual Mode (Precision Enable) Sequence Mode GENERAL PURPOSE INPUT/OUTPUT (GPIO) OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT POWER-GOOD FUNCTION UV COMPARATOR (SEQUENCE MODE ONLY) SOFT START STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLD BACK SHORT-CIRCUIT PROTECTION (SCP) OVERVOLTAGE PROTECTION UNDERVOLTAGE LOCKOUT ACTIVE OUTPUT DISCHARGE SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL PROGRAMMING THE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLES SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CONFIGUATIONS (CFG1 AND CFG2) SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR DESIGNING THE COMPENSATION NETWORK PCB LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE