Datasheet ADP5014 (Analog Devices) - 6

ADP5014 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Soft Start Time tSS2 2 ms Timer ×1 option 16 ms Timer ×8 option Programmable Soft Start Range 2 16 ms Hiccup Time tHICCUP2 7 × tSS2 ms COUT Discharge Switch On RDIS2 85 Ω Resistance CHANNEL 3 SYNC BUCK REGULATOR Load Current ILOAD3 2 A Output Characteristics VFB3 Voltage Accuracy −40°C ≤ TJ ≤ +125°C VFB3 −0.6 +0.6 % VSET3 = VREF −1.0 +1.0 % VSET3 = ½ × VREF Feedback Bias Current IFB3 0.1 μA VSET3 Bias Current IVSET3 0.1 μA SW3 Pin High-Side Power FET On RDS(ON)3H 95 135 mΩ Pin to pin measurement Resistance Low-Side Power FET On RDS(ON)3L 73 110 mΩ Pin to pin measurement Resistance Current-Limit Threshold ITH(ILIM3) 2.5 3.5 4.5 A RCFG1 = 0 kΩ 1.2 1.8 2.4 A RCFG1 = 17.8 kΩ Minimum On Time tMIN_ON3 60 90 ns fSW = 500 kHz to 2.5 MHz Minimum Off Time tMIN_OFF3 50 80 ns fSW = 500 kHz to 2.5 MHz Error Amplifier, COMP3 Pin EA Transconductance gm3 700 800 900 μS Soft Start Time tSS3 2 ms Timer ×1 option 16 ms Timer ×8 option Programmable Soft Start Range 2 16 ms Hiccup Time tHICCUP3 7 × tSS3 ms COUT Discharge Switch On Resistance RDIS3 85 Ω CHANNEL 4 SYNC BUCK REGULATOR Load Current ILOAD4 2 A Output Characteristics VFB4 Voltage Accuracy −40°C ≤ TJ ≤ +125°C VFB4 −0.6 +0.6 % VSET4 = VREF −1.0 +1.0 % VSET4 = ½ × VREF Feedback Bias Current IFB4 0.1 μA VSET4 Bias Current IVSET4 0.1 μA SW4 Pin High-Side Power FET On RDS(ON)4H 95 135 mΩ Pin to pin measurement Resistance Low-Side Power FET On RDS(ON)4L 73 110 mΩ Pin to pin measurement Resistance Current-Limit Threshold ITH(ILIM4) 2.5 3.5 4.5 A RCFG1 = 0 kΩ 1.2 1.8 2.4 A RCFG1 = 17.8 kΩ Minimum On Time tMIN_ON4 60 90 ns fSW = 500 kHz to 2.5 MHz Minimum Off Time tMIN_OFF4 50 80 ns fSW = 500 kHz to 2.5 MHz Error Amplifier, COMP4 Pin EA Transconductance gm4 700 800 900 μS Soft Start Time tSS4 2 ms Timer ×1 option 16 ms Timer ×8 option Programmable Soft Start Range 2 16 ms Hiccup Time tHICCUP4 7 × tSS4 ms COUT Discharge Switch On Resistance RDIS4 85 Ω Rev. 0 | Page 6 of 34 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode FPWM and Automatic PWM/PSM Modes LOW NOISE ARCHITECTURE INTERNAL REFERENCE (VREF) ADJUSTABLE OUTPUT VOLTAGE FUNCTION CONFIGURATIONS (CFG1 AND CFG2) PARALLEL OPERATION MANUAL/SEQUENCE MODE Manual Mode (Precision Enable) Sequence Mode GENERAL PURPOSE INPUT/OUTPUT (GPIO) OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT POWER-GOOD FUNCTION UV COMPARATOR (SEQUENCE MODE ONLY) SOFT START STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLD BACK SHORT-CIRCUIT PROTECTION (SCP) OVERVOLTAGE PROTECTION UNDERVOLTAGE LOCKOUT ACTIVE OUTPUT DISCHARGE SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL PROGRAMMING THE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLES SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CONFIGUATIONS (CFG1 AND CFG2) SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR DESIGNING THE COMPENSATION NETWORK PCB LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE