数据表Datasheet ADP5310 (Analog Devices)
Datasheet ADP5310 (Analog Devices)
制造商 | Analog Devices |
描述 | 3-Channel, Integrated Ultralow Power Solution with Dual Buck Regulators and Load Switch |
页数 / 页 | 28 / 1 — 3-Channel, Integrated Ultralow Power Solution. with Dual Buck Regulators … |
修订版 | A |
文件格式/大小 | PDF / 796 Kb |
文件语言 | 英语 |
3-Channel, Integrated Ultralow Power Solution. with Dual Buck Regulators and Load Switch. Data Sheet. ADP5310. FEATURES
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3-Channel, Integrated Ultralow Power Solution with Dual Buck Regulators and Load Switch Data Sheet ADP5310 FEATURES TYPICAL APPLICATION CIRCUIT Wide input voltage range: 2.7 V to 15.0 V L1 ADP5310 700 nA quiescent current when EN1 = SYNC/MODE = low 4.7µH V EN1 SW1 OUT1 FROM MCU ±1.5% output accuracy over full temperature range in PWM mode CHANNEL 1 C3 PWRGD BUCK PGND1 10µF TO MCU 600 kHz (or 1.2 MHz) switching frequency with optional REGULATOR MLCC PVIN1 (800mA) FB1 synchronization input from 400 kHz to 1.4 MHz VIN = R1 2.7V TO 15V L2 PVIN2 Channel 1: 800 mA buck regulator CHANNEL 2 4.7µH R2 V + SW2 OUT2 nO2 C1 NC ULTRALOW Automatic PSM/PWM or forced PWM mode via factory fuse – POWER C4 10µF PGND2 + BUCK 10µF LiM MLCC 100% duty cycle operation mode SYNC/ REGULATOR MLCC × – MODE FB2 2 (50mA/300mA) Adjustable/fixed output options via factory fuse Power-good flag CHANNEL 3 V EN3 VOUT3 OUT3 FROM MCU LOAD Channel 2: ultralow power buck regulator SWITCH C5 220nF Selectable hysteresis or PWM operation mode VREG AGND MLCC Output current up to 50 mA in hysteresis mode, 300 mA in C6
001
PWM mode with 100% duty cycle operation mode 1µF
13008-
Low noise at 0.8 V reference in PWM mode
Figure 1.
Adjustable/fixed output voltage options via factory fuse Channel 3: high-side load switch Low RDS(ON) of 494 mΩ at VOUT3 = 2.5 V Quick output discharge (QOD) option UVLO, OCP, and TSD protection 16-lead TSSOP_EP package −40°C to +125°C operational junction temperature APPLICATIONS Energy (gas and water) metering Portable and battery-powered equipment Medical applications Keep-alive power supplies GENERAL DESCRIPTION
mode, which draws only 700 nA of quiescent current to regulate the output under zero load and provides up to 50 mA of output The ADP5310 combines dual buck regulators and one load switch current. Hysteresis mode helps achieve excellent efficiency at less in a 16-lead TSSOP_EP package that meets demanding perfor- than 1 mW and can work as a keep-alive power supply in a battery- mance and board space requirements. The device enables direct powered system. When the SYNC/MODE pin is set to high, the connection to a wide input voltage range of 2.7 V to 15.0 V, allowing buck regulator switches to a traditional constant frequency PWM the use of multiple alkaline/NiMH or lithium cel s and other control scheme to provide low output ripple for noise sensitive power sources. applications, and the buck regulator provides up to 300 mA of The buck regulator in Channel 1 uses a current mode, constant output current in PWM mode. frequency pulse-width modulation (PWM) control scheme for Channel 3 integrates a high-side load switch that operates from excel ent stability and transient performance, which provides up 1.65 V to 5.5 V with its input connected to the output of Channel 2. to 800 mA of output current. The automatic PWM/pulse skipping The load switch provides power domain isolation and extends mode (PSM) control scheme achieves excel ent efficiency in light battery operation time. output current. A power-good signal indicates that the output of Channel 1 is within 92% of its nominal value. Other key safety features of the ADP5310 include overcurrent protection (OCP), thermal shutdown (TSD), and input under- An ultralow power buck regulator is integrated in Channel 2 with voltage lockout (UVLO). The ADP5310 is rated for the −40°C the SYNC/MODE pin to control its operation mode. When to +125°C junction temperature range. SYNC/MODE is set to low, the buck regulator operates in hysteresis
Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2015–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATORS AND LOAD SWITCH SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATION MODES PWM Mode PSM Mode Hysteresis Mode Mode Selection ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE AND SHUTDOWN FEATURES INTERNAL LINEAR REGULATOR (VREG) OSCILLATOR AND SYNCHRONIZATION CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE POWER-GOOD FUNCTION LOAD SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR ADJUSTABLE OUTPUT VOLTAGE PROGRAMMING EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses RECOMMENDED BUCK EXTERNAL COMPONENTS CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE