Datasheet ADP5310 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 3-Channel, Integrated Ultralow Power Solution with Dual Buck Regulators and Load Switch |
| 页数 / 页 | 28 / 3 — Data Sheet. ADP5310. DETAILED FUNCTIONAL BLOCK DIAGRAM. VIN. PVIN1. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 796 Kb |
| 文件语言 | 英语 |
Data Sheet. ADP5310. DETAILED FUNCTIONAL BLOCK DIAGRAM. VIN. PVIN1. DRIVER. CHANNEL 1. P_ILIMIT. 1.2A. RDS(ON) × kr. IMIN. SW1. N_ILIMIT
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Data Sheet ADP5310 DETAILED FUNCTIONAL BLOCK DIAGRAM ADP5310 VIN PVIN1 DRIVER CHANNEL 1 P_ILIMIT VIN 1.2A RDS(ON) × kr IMIN SW1 N_ILIMIT 300mA/kr V –0.5A (PWM) IN CONTROL LOGIC 0A (PSM) RDS(ON) × kr PWM VIN SLOPE DRIVER COMPENSATION PSM 0.808V 1.2V PGND1 0.8V 0.4V EN1 FB1 PWRGD 0.736V 0.696V 0.8V V TO I FB1 SOFT START PVIN1 PVIN2 UVLO CH1 2.55V BAND GAP CH2 LDO 1.2V 2.4V BIAS AND CH1 CONTROL 1.2MHz CH2 LOGIC S/H OSC OSC VREG 1.2V SYNC 0.4V SYNC/MODE CH2 VIN PVIN2 DRIVER CHANNEL 2 P_ILIMIT VIN 0.6A RDS(ON) × kr IMIN SW2 N_ILIMIT 300mA/kr V –0.5A (PWM) IN CONTROL LOGIC 0A (PSM) RDS(ON) × kr PWM VIN SLOPE DRIVER COMPENSATION PSM 0.808V PGND2 0.8V FB2 0.8V V TO I SOFT START 1.2V 0.4V EN3 VOUT3 DRIVER
002
CHANNEL 3
13008- Figure 2. Rev. A | Page 3 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATORS AND LOAD SWITCH SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATION MODES PWM Mode PSM Mode Hysteresis Mode Mode Selection ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE AND SHUTDOWN FEATURES INTERNAL LINEAR REGULATOR (VREG) OSCILLATOR AND SYNCHRONIZATION CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE POWER-GOOD FUNCTION LOAD SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR ADJUSTABLE OUTPUT VOLTAGE PROGRAMMING EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses RECOMMENDED BUCK EXTERNAL COMPONENTS CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
002
CHANNEL 3
13008- Figure 2. Rev. A | Page 3 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATORS AND LOAD SWITCH SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATION MODES PWM Mode PSM Mode Hysteresis Mode Mode Selection ADJUSTABLE AND FIXED OUTPUT VOLTAGES UNDERVOLTAGE LOCKOUT (UVLO) ENABLE AND SHUTDOWN FEATURES INTERNAL LINEAR REGULATOR (VREG) OSCILLATOR AND SYNCHRONIZATION CURRENT LIMIT SHORT-CIRCUIT PROTECTION SOFT START STARTUP WITH PRECHARGED OUTPUT 100% DUTY OPERATION ACTIVE DISCHARGE POWER-GOOD FUNCTION LOAD SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION EXTERNAL COMPONENT SELECTION SELECTING THE INDUCTOR OUTPUT CAPACITOR INPUT CAPACITOR ADJUSTABLE OUTPUT VOLTAGE PROGRAMMING EFFICIENCY Power Switch Conduction Losses Inductor Losses Driver Losses Transition Losses RECOMMENDED BUCK EXTERNAL COMPONENTS CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE