Datasheet ADP2380 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 20 V, 4 A synchronous Step-Down Regulator with Low-Side Driver |
| 页数 / 页 | 28 / 9 — Data Sheet. ADP2380. 8.0. ) A (. 7.5. OLD H. (mΩ. S E. 7.0. T S. IT TH. … |
| 文件格式/大小 | PDF / 946 Kb |
| 文件语言 | 英语 |
Data Sheet. ADP2380. 8.0. ) A (. 7.5. OLD H. (mΩ. S E. 7.0. T S. IT TH. 6.5. ESI R. -LIM T. 6.0. AK CURRE. 5.5. E P. 5.0. –40. –20. 100. 120. TEMPERATURE (°C)
该数据表的模型线
文件文字版本
Data Sheet ADP2380 70 8.0 ) A ( 7.5 60 ) OLD H (mΩ S E 7.0 R R O 50 T S IT TH 6.5 ESI R -LIM T 40 ET N SF 6.0 MO 30 AK CURRE 5.5 E P 20 5.0 –40 –20 0 20 40 60 80 100 120
016
–40 –20 0 20 40 60 80 100 120
019
TEMPERATURE (°C)
09939-
TEMPERATURE (°C)
09939- Figure 16. MOSFET RDSON vs. Temperature Figure 19. Current-Limit Threshold vs. Temperature
SW SW 1 1 LD LD 2 2
017
CH1 5.00V CH2 5.00V M20.0ns A CH2 5.50V
020
CH1 5.00V CH2 5.00V M20.0ns A CH2 3.70V T 50.00%
09939-
T 40.00%
09939- Figure 17. Low-Side Driver Rising Edge Waveform, CDL = 2.2 nF Figure 20. Low-Side Driver Falling Edge Waveform, CDL = 2.2 nF
VOUT (AC) EN/SS 1 3 IL VOUT 1 SW IOUT 4 4 PGOOD 2 2
018
CH1 10mV B CH2 10V
021
W M2.00µs A CH2 8.00V CH1 2.00V B CH2 5.00V M2.00ms A CH2 4.40V W CH4 2A Ω B CH3 5.00V B CH4 2.00A Ω B W T 50.20%
09939-
W W T 60.40%
09939- Figure 18. Working Mode Waveform Figure 21. Soft Start with Ful Load Rev. 0 | Page 9 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current-Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Circuit Board Layout Recommendations Typical Applications Circuits Outline Dimensions Ordering Guide
016
–40 –20 0 20 40 60 80 100 120
019
TEMPERATURE (°C)
09939-
TEMPERATURE (°C)
09939- Figure 16. MOSFET RDSON vs. Temperature Figure 19. Current-Limit Threshold vs. Temperature
SW SW 1 1 LD LD 2 2
017
CH1 5.00V CH2 5.00V M20.0ns A CH2 5.50V
020
CH1 5.00V CH2 5.00V M20.0ns A CH2 3.70V T 50.00%
09939-
T 40.00%
09939- Figure 17. Low-Side Driver Rising Edge Waveform, CDL = 2.2 nF Figure 20. Low-Side Driver Falling Edge Waveform, CDL = 2.2 nF
VOUT (AC) EN/SS 1 3 IL VOUT 1 SW IOUT 4 4 PGOOD 2 2
018
CH1 10mV B CH2 10V
021
W M2.00µs A CH2 8.00V CH1 2.00V B CH2 5.00V M2.00ms A CH2 4.40V W CH4 2A Ω B CH3 5.00V B CH4 2.00A Ω B W T 50.20%
09939-
W W T 60.40%
09939- Figure 18. Working Mode Waveform Figure 21. Soft Start with Ful Load Rev. 0 | Page 9 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current-Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Circuit Board Layout Recommendations Typical Applications Circuits Outline Dimensions Ordering Guide