Datasheet ADP5033 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Dual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs |
| 页数 / 页 | 28 / 6 — ADP5033. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL … |
| 修订版 | H |
| 文件格式/大小 | PDF / 831 Kb |
| 文件语言 | 英语 |
ADP5033. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL RESISTANCE. Parameter. Rating. Table 7. Thermal Resistance
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ADP5033 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL RESISTANCE Parameter Rating
θJA and ΨJB are specified for the worst-case conditions, that is, a VIN1 to AGND −0.3 V to +6 V device soldered in a circuit board for surface-mount packages. VIN2 to VIN1 −0.3 V to +0.3 V PGND1, PGND2 to AGND −0.3 V to +0.3 V
Table 7. Thermal Resistance
VIN3, VIN4, VOUT1, VOUT2, ENA, ENB, −0.3 V to
Package Type θJA ΨJB Unit
MODE to AGND (VIN1 + 0.3 V) 16-Ball, 0.5 mm Pitch WLCSP 57 14 °C/W VOUT3 to AGND −0.3 V to (VIN3 + 0.3 V) VOUT4 to AGND −0.3 V to
ESD CAUTION
(VIN4 + 0.3 V) SW1 to PGND1 −0.3 V to (VIN1 + 0.3 V) SW2 to PGND2 −0.3 V to (VIN2 + 0.3 V) Storage Temperature Range −65°C to +150°C Operating Junction Temperature Range −40°C to +125°C Soldering Conditions JEDEC J-STD-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. For detailed information on power dissipation, see the Power Dissipation and Thermal Considerations section. Rev. G | Page 6 of 28 Document Outline Features Applications Typical Application Circuit General Description Table of Contents Revision History Specifications General Specifications BUCK1 and BUCK2 Specifications LDO1 and LDO2 Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Management Unit Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK1 and BUCK2 Control Scheme PWM Mode PSM PSM Current Threshold Oscillator/Phasing of Inductor Switching Short-Circuit Protection Soft Start Current Limit 100% Duty Operation Active Pull-Downs LDO1 and LDO2 Applications Information Buck External Component Selection Inductor Output Capacitor Input Capacitor LDO Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Power Dissipation and Thermal Considerations Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature PCB Layout Guidelines Typical Application Schematic Outline Dimensions Ordering Guide
ADP5033 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL RESISTANCE Parameter Rating
θJA and ΨJB are specified for the worst-case conditions, that is, a VIN1 to AGND −0.3 V to +6 V device soldered in a circuit board for surface-mount packages. VIN2 to VIN1 −0.3 V to +0.3 V PGND1, PGND2 to AGND −0.3 V to +0.3 V
Table 7. Thermal Resistance
VIN3, VIN4, VOUT1, VOUT2, ENA, ENB, −0.3 V to
Package Type θJA ΨJB Unit
MODE to AGND (VIN1 + 0.3 V) 16-Ball, 0.5 mm Pitch WLCSP 57 14 °C/W VOUT3 to AGND −0.3 V to (VIN3 + 0.3 V) VOUT4 to AGND −0.3 V to
ESD CAUTION
(VIN4 + 0.3 V) SW1 to PGND1 −0.3 V to (VIN1 + 0.3 V) SW2 to PGND2 −0.3 V to (VIN2 + 0.3 V) Storage Temperature Range −65°C to +150°C Operating Junction Temperature Range −40°C to +125°C Soldering Conditions JEDEC J-STD-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. For detailed information on power dissipation, see the Power Dissipation and Thermal Considerations section. Rev. G | Page 6 of 28 Document Outline Features Applications Typical Application Circuit General Description Table of Contents Revision History Specifications General Specifications BUCK1 and BUCK2 Specifications LDO1 and LDO2 Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Management Unit Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK1 and BUCK2 Control Scheme PWM Mode PSM PSM Current Threshold Oscillator/Phasing of Inductor Switching Short-Circuit Protection Soft Start Current Limit 100% Duty Operation Active Pull-Downs LDO1 and LDO2 Applications Information Buck External Component Selection Inductor Output Capacitor Input Capacitor LDO Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Power Dissipation and Thermal Considerations Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature PCB Layout Guidelines Typical Application Schematic Outline Dimensions Ordering Guide