Datasheet LTC3548A (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Dual Synchronous 400mA/800mA, 2.25MHz Step-Down DC/DC Regulator |
| 页数 / 页 | 20 / 3 — ELECTRICAL CHARACTERISTICS The. denotes the specifi cations which apply … |
| 文件格式/大小 | PDF / 255 Kb |
| 文件语言 | 英语 |
ELECTRICAL CHARACTERISTICS The. denotes the specifi cations which apply over the full operating
该数据表的模型线
文件文字版本
LTC3548A
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are at TJ = 25°C. VIN = 3.6V, unless otherwise specifi ed. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Operating Voltage Range ● 2.5 5.5 V IFB Feedback Pin Input Current ● 30 nA VFB Feedback Voltage (Note 3) 0°C ≤ TA ≤ 85°C 0.588 0.6 0.612 V –40°C ≤ TA ≤ 125°C (Note 2) ● 0.585 0.6 0.612 V ΔVLINE REG Reference Voltage Line Regulation VIN = 2.5V to 5.5V (Note 3) 0.3 0.5 %/V ΔVLOAD REG Output Voltage Load Regulation MODE/SYNC = 0V (Note 3) 0.5 % IS Input DC Supply Current (Note 4) Active Mode VFB1 = VFB2 = 0.5V 700 950 μA Sleep Mode VFB1 = VFB2 = 0.63V, MODE/SYNC = 3.6V 40 60 μA Shutdown RUN = 0V, VIN = 5.5V, MODE/SYNC = 0V 0.1 1 μA fOSC Oscillator Frequency VFBX = 0.6V ● 1.8 2.25 2.7 MHz fSYNC Synchronization Frequency 2.25 MHz ILIM Peak Switch Current Limit Channel 1 VIN = 3V, VFBX = 0.5V, Duty Cycle < 35% 1 1.2 1.6 A Peak Switch Current Limit Channel 2 VIN = 3V, VFBX = 0.5V, Duty Cycle < 35% 0.6 0.7 0.9 A RDS(ON) Top Switch On-Resistance (Note 6) 0.35 0.45 Ω Bottom Switch On-Resistance (Note 6) 0.30 0.45 Ω ISW(LKG) Switch Leakage Current VIN = 5V, VRUN = 0V, VFBX = 0V 0.01 1 μA POR Power-On Reset Threshold VFBX Ramping Up, MODE/SYNC = 0V 8.5 % VFBX Ramping Down, MODE/SYNC = 0V –8.5 % Power-On Reset On-Resistance 100 200 Ω Power-On Reset Delay 65,536 Cycles VRUN RUN/SS Threshold Low ● 0.3 1 1.5 V RUN/SS Threshold High ● 2 V IRUN RUN/SS Leakage Current ● 0.01 1 μA VMODE MODE Threshold Low 0 0.5 V MODE Threshold High VIN – 0.5 VIN V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 3:
The LTC3548A is tested in a proprietary test mode that connects may cause permanent damage to the device. Exposure to any Absolute VFB to the output of the error amplifier. Maximum Rating condition for extended periods may affect device
Note 4:
Dynamic supply current is higher due to the internal gate charge reliability and lifetime. being delivered at the switching frequency.
Note 2:
The LTC3548AE is guaranteed to meet specified performance from
Note 5:
TJ is calculated from the ambient, TA, and power dissipation, PD, 0°C to 85°C. Specifications over the –40°C and 125°C operating junction according to the following formula: temperature range are assured by design, characterization and correlation TJ = TA + (PD • θJA). with statistical process controls. The LTC3548AI is guaranteed over the
Note 6:
The DFN switch on-resistance is guaranteed by correlation to full –40°C to 125°C operating junction temperature range. Note that wafer level measurements. the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 3548afa 3
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are at TJ = 25°C. VIN = 3.6V, unless otherwise specifi ed. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Operating Voltage Range ● 2.5 5.5 V IFB Feedback Pin Input Current ● 30 nA VFB Feedback Voltage (Note 3) 0°C ≤ TA ≤ 85°C 0.588 0.6 0.612 V –40°C ≤ TA ≤ 125°C (Note 2) ● 0.585 0.6 0.612 V ΔVLINE REG Reference Voltage Line Regulation VIN = 2.5V to 5.5V (Note 3) 0.3 0.5 %/V ΔVLOAD REG Output Voltage Load Regulation MODE/SYNC = 0V (Note 3) 0.5 % IS Input DC Supply Current (Note 4) Active Mode VFB1 = VFB2 = 0.5V 700 950 μA Sleep Mode VFB1 = VFB2 = 0.63V, MODE/SYNC = 3.6V 40 60 μA Shutdown RUN = 0V, VIN = 5.5V, MODE/SYNC = 0V 0.1 1 μA fOSC Oscillator Frequency VFBX = 0.6V ● 1.8 2.25 2.7 MHz fSYNC Synchronization Frequency 2.25 MHz ILIM Peak Switch Current Limit Channel 1 VIN = 3V, VFBX = 0.5V, Duty Cycle < 35% 1 1.2 1.6 A Peak Switch Current Limit Channel 2 VIN = 3V, VFBX = 0.5V, Duty Cycle < 35% 0.6 0.7 0.9 A RDS(ON) Top Switch On-Resistance (Note 6) 0.35 0.45 Ω Bottom Switch On-Resistance (Note 6) 0.30 0.45 Ω ISW(LKG) Switch Leakage Current VIN = 5V, VRUN = 0V, VFBX = 0V 0.01 1 μA POR Power-On Reset Threshold VFBX Ramping Up, MODE/SYNC = 0V 8.5 % VFBX Ramping Down, MODE/SYNC = 0V –8.5 % Power-On Reset On-Resistance 100 200 Ω Power-On Reset Delay 65,536 Cycles VRUN RUN/SS Threshold Low ● 0.3 1 1.5 V RUN/SS Threshold High ● 2 V IRUN RUN/SS Leakage Current ● 0.01 1 μA VMODE MODE Threshold Low 0 0.5 V MODE Threshold High VIN – 0.5 VIN V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 3:
The LTC3548A is tested in a proprietary test mode that connects may cause permanent damage to the device. Exposure to any Absolute VFB to the output of the error amplifier. Maximum Rating condition for extended periods may affect device
Note 4:
Dynamic supply current is higher due to the internal gate charge reliability and lifetime. being delivered at the switching frequency.
Note 2:
The LTC3548AE is guaranteed to meet specified performance from
Note 5:
TJ is calculated from the ambient, TA, and power dissipation, PD, 0°C to 85°C. Specifications over the –40°C and 125°C operating junction according to the following formula: temperature range are assured by design, characterization and correlation TJ = TA + (PD • θJA). with statistical process controls. The LTC3548AI is guaranteed over the
Note 6:
The DFN switch on-resistance is guaranteed by correlation to full –40°C to 125°C operating junction temperature range. Note that wafer level measurements. the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 3548afa 3