Datasheet LTC3548A (Analog Devices) - 8

LTC3548A
OPERATION
The LTC3548A uses a constant frequency, current mode automatically switches into Burst Mode operation in which architecture. The operating frequency is set at 2.25MHz the PMOS switch operates intermittently based on load and can be synchronized to an external oscillator. Both demand with a fixed peak inductor current. By running channels share the same clock and run in phase. To suit cycles periodically, the switching losses which are domi- a variety of applications, the selectable MODE/SYNC pin nated by the gate charge losses of the power MOSFETs allows the user to trade-off noise for efficiency. are minimized. The main control loop is interrupted when the output voltage reaches the desired regulated value. A The output voltage is set by an external divider returned voltage comparator trips when I to the V TH is below 0.65V, shutting FB pins. An error amplifier compares the divided off the switch and reducing the power. The output capaci- output voltage with a reference voltage of 0.6V and adjusts tor and the inductor supply the power to the load until I the peak inductor current accordingly. Overvoltage and TH exceeds 0.65V, turning on the switch and the main control undervoltage comparators will pull the POR output low if loop which starts another cycle. the output voltage is not within ±8.5%. The POR output will go high after 65,536 clock cycles (about 29ms in For lower ripple noise at low currents, the pulse-skipping pulse-skipping mode) of achieving regulation. mode can be used. In this mode, the LTC3548A continues to switch at a constant frequency down to very low cur-
Main Control Loop
rents, where it will begin skipping pulses. During normal operation, the top power switch (P-channel
Dropout Operation
MOSFET) is turned on at the beginning of a clock cycle when the VFB voltage is below the reference voltage. The current When the input supply voltage decreases toward the into the inductor and the load increases until the current output voltage, the duty cycle increases to 100% which limit is reached. The switch turns off and energy stored in is the dropout condition. In dropout, the PMOS switch is the inductor flows through the bottom switch (N-channel turned on continuously with the output voltage being equal MOSFET) into the load until the next clock cycle. to the input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the er- An important design consideration is that the RDS(ON) ror amplifier. This amplifier compares the VFB pin to the of the P-channel switch increases with decreasing input 0.6V reference. When the load current increases, the supply voltage (See Typical Performance Characteristics). VFB voltage decreases slightly below the reference. This Therefore, the user should calculate the power dissipation decrease causes the error amplifier to increase the ITH when the LTC3548A is used at 100% duty cycle with low voltage until the average inductor current matches the input voltage (See Thermal Considerations in the Applica- new load current. tions Information Section). The main control loop is shut down by pulling the RUN/SS
Low Supply Operation
pin to ground. The LTC3548A incorporates an undervoltage lockout circuit
Low Current Operation
which shuts down the part when the input voltage drops below about 1.65V to prevent unstable operation. Two modes are available to control the operation of the LTC3548A at low currents. Both modes automatically A general LTC3548A application circuit is shown in Figure 1. switch from continuous operation to the selected mode External component selection is driven by the load require- when the load current is low. ment, and begins with the selection of the inductor L. Once the inductor is chosen, C To optimize efficiency, the Burst Mode operation can be IN and COUT can be selected. selected. When the load is relatively light, the LTC3548A 3548afa 8