Datasheet LTC3446 (Analog Devices) - 9

LTC3446
operaTion
The LTC3446 combines a constant frequency, current mode
Overcurrent Protection
synchronous buck converter with two very low dropout To help avert inductor current runaway in case the buck (VLDO) linear DC regulators to provide up to three high output is accidentally shorted to ground, the LTC3446 efficiency, low voltage outputs from a single higher voltage features a bottom switch NMOS overcurrent limit, which input source. Each output can be independently enabled works as follows. and disabled. A power good circuit monitors all three sup- plies. The LTC3446 incorporates an undervoltage lockout When the buck output is shorted to ground, inductor circuit that shuts down the IC when the input voltage drops current will rise to its maximum peak level, IMAXP, such below about 2.4V to prevent unstable operation. that on every oscillator cycle the PMOS top switch will turn on for only its minimum duty cycle, and the bottom
SYNCHRONOUS BUCK OPERATION
switch NMOS turns on for the remainder of the cycle. Temporarily ignoring inductor, switch and parasitic resis- A buck converter takes power from a high input voltage, tance drops, which in most applications are designed to VIN, and delivers it at a lower output voltage, VOUT. The buck be small in order to maximize buck converter efficiency, converter inside the LTC3446 achieves over 80% efficient it is to first order true that when the PMOS is on, the VIN power conversion under a wide range of VIN, VOUT and load supply voltage is placed across the inductor, increasing conditions, whereas a linear regulator is limited by physics the inductor current, but when the NMOS is on, there is no to a maximum efficiency of (VOUT/VIN) × 100%. output voltage to be placed across the inductor to reduce its current. Inductor current ratchets up each cycle and
Main Control Loop
could lead to the destruction of the buck IC. During normal operation, the internal oscillator produces a The NMOS overcurrent limit helps prevent this by sensing constant frequency 2.25MHz clock. The top power switch the current through the NMOS bottom switch, and for as (P-channel MOSFET) turns on at the beginning of a clock long as this current exceeds the overcurrent limit level, cycle. Inductor current increases to a peak value which is I set by the voltage on the I MAXN, it: TH pin. Then the top switch turns off and the energy stored in the inductor flows through 1. Keeps the NMOS on, allowing the tiny voltage drops from the bottom switch (N-channel MOSFET) into the load until parasitic resistances to reduce the inductor current. the next clock cycle. 2. Refuses to allow the PMOS to turn on, preventing any The peak inductor current is controlled by the voltage on additional energy from being fed into the system. the ITH pin, which is the output of the error amplifier. This amplifier compares the BUCKFB pin to the 0.8V reference.
Low Current Operation
When the load current increases, the BUCKFB voltage de- The MODESEL pin controls the buck converter’s behavior at creases slightly below the reference. This decrease causes light load currents to help optimize efficiency, output ripple the error amplifier to increase the ITH voltage until the and noise. When the load is relatively light and MODESEL average inductor current matches the new load current. is grounded, the buck converter automatically switches The main control loop is shut down by pulling the ENBUCK into Burst Mode operation, which operates the PMOS pin to ground. 3446ff 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts