Datasheet LT1964 (Analog Devices) - 4

制造商Analog Devices
描述200mA, Low Noise, Low Dropout Negative Micropower Regulator
页数 / 页16 / 4 — ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply …
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ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply over the full operating

ELECTRICAL CHARACTERISTICS The denotes the specifi cations which apply over the full operating

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LT1964
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C.
Output Voltage Noise COUT = 10μF, CBYP = 0.01μF, ILOAD = –200mA, BW = 10Hz to 100kHz 30 μVRMS ADJ Pin Bias Current (Notes 2, 7) 30 100 nA Minimum Input Voltage (Note 12) LT1964-BYP l –1.9 –2.8 V ILOAD = –200mA LT1964-SD l –1.6 –2.2 V Shutdown Threshold VOUT = Off to On (Positive) l 1.6 2.1 V VOUT = Off to On (Negative) l –1.9 –2.8 V VOUT = On to Off (Positive) l 0.25 0.8 V VOUT = On to Off (Negative) l –0.25 –0.8 V SHDN Pin Current (Note 8) VSHDN = 0V –1 ±0.1 1 μA VSHDN = 15V 6 15 μA VSHDN = –15V –3 –9 μA Quiescent Current in Shutdown VIN = –6V, VSHDN = 0V l 3 10 μA Ripple Rejection VIN – VOUT = –1.5V(Avg), VRIPPLE = 0.5VP-P, 46 54 dB fRIPPLE = 120Hz, ILOAD = –200mA Current Limit VIN = –6V, VOUT = 0V 350 mA VIN = VOUT(NOMINAL) –1.5V, ΔVOUT = 0.1V l 220 mA Input Reverse Leakage Current VIN = 20V, VOUT, VADJ, VSHDN = Open Circuit l 1 mA
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 7:
ADJ pin bias current fl ows out of the ADJ pin. may cause permanent damage to the device. Exposure to any Absolute
Note 8:
Positive SHDN pin current fl ows into the SHDN pin. SHDN pin Maximum Rating condition for extended periods may affect device current is included in the GND pin current specifi cation. reliability and lifetime
Note 9:
For input-to-output differential voltages greater than 7V, a 50μA
Note 2:
The LT1964 (adjustable version) is tested and specifi ed for these load is needed to maintain regulation. conditions with the ADJ pin connected to the OUT pin.
Note 10:
The LT1964 is tested and specifi ed under pulse load conditions
Note 3:
Operating conditions are limited by maximum junction such that TJ ≅ TA. The LT1964E is tested at TA = 25°C. Performance at temperature. The regulated output voltage specifi cation will not apply –40°C to 125°C is assured by design, characterization and correlation with for all possible combinations of input voltage and output current. When statistical process controls. The LT1964I is guaranteed over the full –40°C operating at maximum input voltage, the output current range must be to 125°C operating junction temperature range. limited. When operating at maximum output current, the input voltage
Note 11:
A parasitic diode exists internally on the LT1964 between the range must be limited. OUT, ADJ and SHDN pins and the IN pin. The OUT, ADJ and SHDN pins
Note 4:
To satisfy requirements for minimum input voltage, the LT1964 cannot be pulled more than 0.5V more negative than the IN pin during (adjustable version) is tested and specifi ed for these conditions with an fault conditions, and must remain at a voltage more positive than the IN external resistor divider (two 249k resistors) for an output voltage of pin during operation. –2.44V. The external resistor divider will add a 5μA DC load on the output.
Note 12:
For the LT1964-BYP, this specifi cation accounts for the operating
Note 5:
Dropout voltage is the minimum input to output voltage differential threshold of the SHDN pin, which is tied to the IN pin internally. For the needed to maintain regulation at a specifi ed output current. In dropout, the LT1964-SD, the SHDN threshold must be met to ensure device operation. output voltage will be equal to: (VIN + VDROPOUT).
Note 13:
Actual thermal resistance (θJA) junction to ambient will be a
Note 6:
GND pin current is tested with VIN = VOUT(NOMINAL) and a current function of board layout. See the Thermal Considerations section in the source load. This means the device is tested while operating in its dropout Applications Information. region. This is the worst-case GND pin current. The GND pin current will decrease slightly at higher input voltages. 1964fb 4