Datasheet MAX1932 (Maxim) - 3

MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply
Electrical Characteristics (continued)
(VIN = 3.3V, CS = SCLK = DIN = 3.3V, CS+ = CS- = 45V, Circuit of Figure 2,
TA = 0°C to +85°C
, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS (DIN, SCLK,
CS
)
Input Low Voltage 0.6 V Input High Voltage 1.4 V Input Hysteresis 200 mV TA = +25°C -1 +1 µA Input Leakage Current TA = 0°C to +85°C 10 nA Input Capacitance 5 pF
DIGITAL OUTPUT (
CL
)
Output Low Voltage ISINK = 1mA 0.1 V Output High Voltage ISOURCE = 0.5mA VIN - 0.5 V
SPI TIMING (FIGURE 5)
SCLK Clock Frequency fSCLK 2 MHz SCLK Low Period tCL 125 ns SCLK High Period tCH 125 ns Data Hold Time tDH 0 ns Data Setup Time tDS 125 ns CS Assertion to SCLK tCSS0 200 ns Rising Edge Setup Time CS Deassertion to SCLK tCSS1 200 ns Rising Edge Setup Time SCLK Rising Edge tCSH1 200 ns to CS Deassertion SCLK Rising Edge tCSH0 200 ns to CS Assertion CS High Period tCSW 300 ns
Electrical Characteristics
(VIN = 3.3V, CS = SCLK = DIN = 3.3V, CS+ = CS- = 45V, Circuit of Figure 2,
TA = -40°C to +85°C
, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS GENERAL
Input Supply Range VIN 2.7 5.5 V VIN Undervoltage Lockout UVLO Both rise/fall, hysteresis = 100mV 2.1 2.6 V Operating Supply Current IIN 1 mA VIN Shutdown Supply Current ISHDN 00 hex loaded to DAC 65 µA Input Resistance for CS+/CS- Resistance from either pin to ground 0.5 2 MΩ Current-Limit Threshold 1.80 2.20 V for CS+/CS- Gate-Driver Resistance Gate high or low, IGATE = ±50mA 10 Ω FB Input Bias Current -30 +30 nA www.maximintegrated.com Maxim Integrated | 3