Datasheet MAX1932 (Maxim) - 4

制造商Maxim
描述Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply
页数 / 页16 / 4 — Electrical Characteristics (continued). TA = -40°C to +85°C. PARAMETER. …
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Electrical Characteristics (continued). TA = -40°C to +85°C. PARAMETER. SYMBOL. CONDITIONS. MIN. TYP. MAX. UNITS

Electrical Characteristics (continued) TA = -40°C to +85°C PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

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MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply
Electrical Characteristics (continued)
(VIN = 3.3V, CS = SCLK = DIN = 3.3V, CS+ = CS- = 45V, Circuit of Figure 2,
TA = -40°C to +85°C
, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
FB Voltage VFB 1.23875 1.26125 V FB to COMP Transconductance COMP = 1.5V 50 200 µS COMP Pulldown Resistance DAC code = 00 hex 100 Ω in Shutdown D AC OU T to FB V ol tag e D i ffer ence DAC code = FF hex -4 +4 mV D AC OU T Differential Nonlinearity DAC Code = 01 to FF hex, DAC -1 +1 LSB (Note 1) guaranteed monotonic DAC code = 0F to FF hex, source or sink D AC OU T Load Regulation -1 +1 mV 50µA Switching Frequency fOSC 240 360 kHz
DIGITAL INPUTS (DIN, SCLK,
CS
)
Input Low Voltage 0.6 V Input High Voltage 1.4 V
DIGITAL OUTPUT (
CL
)
Output Low Voltage ISINK = 1mA 0.1 V Output High Voltage ISOURCE = 0.5mA VIN - 0.5 V
SPI TIMING (FIGURE 5)
SCLK Clock Frequency fSCLK 2 MHz SCLK Low Period tCL 125 ns SCLK High Period tCH 125 ns Data Hold Time tDH 0 ns Data Setup Time tDS 125 ns CS Assertion to SCLK tCSS0 200 ns Rising Edge Setup Time CS Deassertion to SCLK tCSS1 200 ns Rising Edge Setup Time SCLK Rising Edge tCSH1 200 ns to CS Deassertion SCLK Rising Edge tCSH0 200 ns to CS Assertion CS High Period tCSW 300 ns
Note 1:
DACOUT = DAC code x (1.25V/256) + 1.25V/256.
Note 2:
Specifications to -40°C are guaranteed by design and not production tested. www.maximintegrated.com Maxim Integrated | 4