Datasheet A80601, A80601-1 (Allegro) - 8

A80601 and High Power LED Driver with Pre-Emptive Boost A80601-1 for Ultra-High Dimming Ratio and Low Output Ripple ELECTRICAL CHARACTERISTICS [1] (continued): Unless otherwise noted, specifications are valid at VIN = 12 V, TJ = 25°C, • indi- cates specifications guaranteed over the full operating temperature range with TJ = –40°C to 125°C, typical specifications are at TJ = 25°C Characteristics Symbol Test Conditions Min. Typ. Max. Unit LED CURRENT SINKS
LEDx Accuracy [4] ErrLED iISET = 120 µA (RISET = 8.33 kΩ) ● − 0.7 3 % LEDx Matching ΔLEDx iISET = 120 µA ● − 0.8 2 % Measured individually with all A80601 ● 650 750 850 mV LEDx Regulation Voltage VLED other LED pins tied to ≥1 V, iISET = 120 µA, VADIM > 2.1 V A80601-1 ● 760 860 960 mV IISET to ILEDx Current Gain AISET iISET = 120 µA ● 1432 1466 1500 A/A ISET Pin Voltage VISET VADIM > 2.1 V 0.955 0.985 1.015 V Allowable ISET Current iISET VADIM > 2.1 V ● 20 − 144 µA LED String Partial-Short Detect V Sensed from each LED pin to GND while its current LEDSD sink is in regulation; all other LED pins tied to 1 V ● 4.9 5.5 6.1 V LED Pin Shorted-to-GND Test Wait time before proceeding with Soft-Start (if Duration [2] tLEDSTG no LED pin is shorted to GND) − 1.5 − ms Maximum time duration before all LED Soft-Start Ramp-Up Time [2] tSSRU channels come into regulation, or OVP is 6.6 8.2 9.8 ms tripped, whichever comes first Enable Pin Shut Down Delay t EN goes from High to Low; exceeding tEN(OFF) EN(OFF) results in IC shutdown ● 10 16 22 ms Minimum PWM On-Time tPWMH First and subsequent PWM pulses ● − 0.3 0.4 µs
INPUT DISCONNECT GATE PIN
Gate Pin Sink Current IGSINK VGS = VIN, no input OCP fault − −113 − µA Gate Pin Source Current IGSOURCE VGS = VIN – 6 V, input OCP fault tripped − 6 − mA Gate Shutdown Delay When Over- Current Fault Is Tripped [2] tGATEFAULT VIN – VSENSE = 200 mV; monitored at FAULT pin − − 3 µs Gate Voltage V PMOS Gate to source voltage measured when GS gate is on − −6.7 − V
VSENSE PIN
VSENSE Pin Sink Current iADJ ● 16 20 24 µA VSENSE Trip Point VSENSETRIP Measured between VIN and VSENSE, RADJ = 0 Ω ● 88 98 108 mV
FAULT PIN
FAULT Output Pull-Down Voltage VFAULT iFAULT = 1 mA − − 0.5 V FAULT Pin Leakage Current IFAULT-LKG VFAULT = 5 V − − 1 µA External FAULT Input Low VFIL No internal faults; FAULT pin externally pulled down ● − − 0.8 V External FAULT Input High VFIH No internal faults ● 1.5 − − V No internal faults; delay (in fSW cycles) from External FAULT Deglitch Timer tFIL FAULT pin externally pulled L to LED off; − 8 − cycles ignored if FAULT returns to H before that
THERMAL PROTECTION (TSD)
Thermal Shutdown Threshold [2] TSD Temperature rising 155 170 − °C Thermal Shutdown Hysteresis [2] TSDHYS − 20 − °C [1] For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing); positive current is defined as going into the node or pin (sinking). [2] Ensured by design and characterization; not production tested. [3] Minimum VIN = 4.5 V is only required at startup. After startup is completed, IC can continue to operate down to VIN = 4 V. [4] LED current is trimmed to cancel variations in both Gain and ISET voltage. Allegro MicroSystems, LLC 8 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming ADIM Mode APWM Mode Extending LED Dimming Ratio Analog Dimming with External Voltage VDD VDRV Shutdown Fault Detection and Protection FAULT Status LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Input Current Sense Resistor Input UVLO Fault Protection During Operation Package Outline Drawing Appendix: External MOSFET Selection Guide