link to page 14 link to page 14 link to page 6 Data SheetAD7606-EPParameterTest Conditions/CommentsMinTypMaxUnit ANALOG INPUT Input Voltage Ranges RANGE = 1 ±10 V RANGE = 0 ±5 V Analog Input Current 10 V, see Figure 11 5.4 µA 5 V, see Figure 11 2.5 µA Input Capacitance6 5 pF Input Impedance 1 MΩ REFERENCE INPUT AND OUTPUT Reference Input Voltage Range 2.475 2.5 2.525 V DC Leakage Current ±1 µA Input Capacitance6 REF SELECT = 1 7.5 pF Reference Output Voltage REFIN/REFOUT 2.49/ V 2.505 Reference Temperature Coefficient ±15 ppm/°C LOGIC INPUTS Input High Voltage (VINH) 0.7 × VDRIVE V Input Low Voltage (VINL) 0.3 × VDRIVE V Input Current (IIN) ±2 µA Input Capacitance (CIN)6 5 pF LOGIC OUTPUTS Output High Voltage (VOH) Source current (ISOURCE) = 100 µA VDRIVE − 0.2 V Output Low Voltage (VOL) Sink current (ISINK) = 100 µA 0.2 V Floating State Leakage Current ±1 ±20 µA Floating State Output Capacitance6 5 pF Output Coding Twos complement CONVERSION RATE Conversion Time All eight channels included, see Table 2 4.5 µs Track-and-Hold Acquisition Time 1.5 µs Throughput Rate Per channel, all eight channels included 150 kSPS POWER REQUIREMENTS AVCC 4.75 5.25 V VDRIVE 2.3 5.25 V Total Current (ITOTAL) Digital inputs = 0 V or VDRIVE Normal Mode (Static) 16 22 mA Normal Mode (Operational)7 fSAMPLE = 150 kSPS 20 27 mA Standby Mode 5 8 mA Shutdown Mode 2 7 µA Power Dissipation Normal Mode (Static) 80 115.5 mW Normal Mode (Operational)7 fSAMPLE = 150 kSPS 100 142 mW Standby Mode 25 42 mW Shutdown Mode 10 36.8 µW 1 See the Terminology section in the AD7606 datasheet. 2 This specification applies when reading during a conversion or after a conversion. If reading during a conversion in paral el mode with VDRIVE = 5 V, SNR typical y reduces by 1.5 dB and THD by 3 dB. 3 LSB means least significant bit. With ±5 V input range, 1 LSB = 152.58 µV. With ±10 V input range, 1 LSB = 305.175 µV. 4 These specifications include the full temperature range variation and contribution from the internal reference buffer but do not include the error contribution from the external reference. 5 Bipolar zero code error is calculated with respect to the analog input voltage. 6 Sample tested during initial release to ensure compliance. 7 Operational power and current figure includes contribution when running in oversampling mode. Rev. 0 | Page 5 of 15 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE