Datasheet AD7790 (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | 16-Bit, Single-Channel, Ultra Low Power, Sigma Delta A/D Converter |
| 页数 / 页 | 6 / 2 — AD7790. Key Sheet. KEY CHARACTERISTICS FUNDAMENTAL SPECIFICATIONS. Table … |
| 文件格式/大小 | PDF / 127 Kb |
| 文件语言 | 英语 |
AD7790. Key Sheet. KEY CHARACTERISTICS FUNDAMENTAL SPECIFICATIONS. Table 1. Parameter. Min. Typ. Max. Unit. NOISE
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AD7790 Key Sheet KEY CHARACTERISTICS FUNDAMENTAL SPECIFICATIONS Table 1. Parameter Min Typ Max Unit
ADC Type Σ- Δ ADC Number of Input Channels One fully differential input channel Resolution 16 16 Bits Output Data Rate (ODR) 9.5 120 SPS Differential Input Voltage Range −REFIN/gain +REFIN/gain V Power Supply Voltage VDD with Respect to GND 2.5 5.25 V Power Supply Current With VDD = 3.6 V, Buffer Off 65 75 µA With VDD = 5.25 V, Buffer On 145 160 µA Offset Error ±3 µV Offset Error Drift vs. Temperature ±10 nV/°C Full-Scale Error ±10 µV Gain Drift vs. Temperature ±0.5 ppm/°C Integral Nonlinearity (INL) −15 ±3.5 +15 ppm of FSR Power Supply Rejection 90 dB Operating Temperature Range −40 +105 °C
NOISE Table 2. Output Data Rates and RMS Noise Output Data Rate (SPS) f3dB (Hz) RMS Noise (µV) Rejection
120 28 40 25 dB @ 60 Hz 100 24 25 25 dB @ 50 Hz 33.3 8 3.36 20 4.7 1.6 80 dB @ 60 Hz 16.6 4 1.5 65 dB @ 50 Hz and 60 Hz (default setting)1 16.7 4 1.5 80 dB @ 50 Hz 13.3 3.2 1.2 9.5 2.3 1.1 62 dB @ 50 Hz and 60 Hz 1 Simultaneous 50 Hz and 60 Hz rejection is optimized when the ODR equals 16.6 SPS because notches are placed at both 50 Hz and 60 Hz with this update rate. Rev. 0 | Page 2 of 6 Document Outline General Description Features and Benefits Key Characteristics Fundamental Specifications Noise Operating the AD7790 Data Interface Data Modes Continuous Conversion Mode (Default) Continuous Read Mode Single Conversion Mode Typical Application Diagram Frequently Asked Questions Learn More and Start Designing Compatible Devices Package Diagram Getting Started
AD7790 Key Sheet KEY CHARACTERISTICS FUNDAMENTAL SPECIFICATIONS Table 1. Parameter Min Typ Max Unit
ADC Type Σ- Δ ADC Number of Input Channels One fully differential input channel Resolution 16 16 Bits Output Data Rate (ODR) 9.5 120 SPS Differential Input Voltage Range −REFIN/gain +REFIN/gain V Power Supply Voltage VDD with Respect to GND 2.5 5.25 V Power Supply Current With VDD = 3.6 V, Buffer Off 65 75 µA With VDD = 5.25 V, Buffer On 145 160 µA Offset Error ±3 µV Offset Error Drift vs. Temperature ±10 nV/°C Full-Scale Error ±10 µV Gain Drift vs. Temperature ±0.5 ppm/°C Integral Nonlinearity (INL) −15 ±3.5 +15 ppm of FSR Power Supply Rejection 90 dB Operating Temperature Range −40 +105 °C
NOISE Table 2. Output Data Rates and RMS Noise Output Data Rate (SPS) f3dB (Hz) RMS Noise (µV) Rejection
120 28 40 25 dB @ 60 Hz 100 24 25 25 dB @ 50 Hz 33.3 8 3.36 20 4.7 1.6 80 dB @ 60 Hz 16.6 4 1.5 65 dB @ 50 Hz and 60 Hz (default setting)1 16.7 4 1.5 80 dB @ 50 Hz 13.3 3.2 1.2 9.5 2.3 1.1 62 dB @ 50 Hz and 60 Hz 1 Simultaneous 50 Hz and 60 Hz rejection is optimized when the ODR equals 16.6 SPS because notches are placed at both 50 Hz and 60 Hz with this update rate. Rev. 0 | Page 2 of 6 Document Outline General Description Features and Benefits Key Characteristics Fundamental Specifications Noise Operating the AD7790 Data Interface Data Modes Continuous Conversion Mode (Default) Continuous Read Mode Single Conversion Mode Typical Application Diagram Frequently Asked Questions Learn More and Start Designing Compatible Devices Package Diagram Getting Started