Datasheet LTM2173-14 (Analog Devices) - 5

link to page 19 LTM2173-14
DIGITAL INPUTS AND OUTPUTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ENCODE INPUTS (ENC+, ENC– )
VID Differential Input Voltage (Note 8) l 0.2 V VICM Common Mode Input Voltage Internally Set 1.2 V Externally Set (Note 8) l 1.1 1.6 V VIN Input Voltage Range ENC+, ENC– to GND l 0.2 3.6 V RIN Input Resistance (See Figure 10) 10 kΩ CIN Input Capacitance 3.5 pF
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
VIH High Level Input Voltage VDD = 1.8V l 1.3 V VIL Low Level Input Voltage VDD = 1.8V l 0.6 V IIN Input Current VIN = 0V to 3.6V l –10 10 µA CIN Input Capacitance 3 pF
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2kΩ Pull-Up Resistor if SDO Is Used)
ROL Logic Low Output Resistance to GND VDD = 1.8V, SDO = 0V 200 Ω IOH Logic High Output Leakage Current SDO = 0V to 3.6V l –10 10 µA COUT Output Capacitance 3 pF
DIGITAL DATA OUTPUTS
VOD Differential Output Voltage 100Ω Differential Load, 3.5mA Mode l 247 350 454 mV 100Ω Differential Load, 1.75mA Mode l 125 175 250 mV VOS Common Mode Output Voltage 100Ω Differential Load, 3.5mA Mode l 1.125 1.250 1.375 V 100Ω Differential Load, 1.75mA Mode l 1.125 1.250 1.375 V RTERM On-Chip Termination Resistance Termination Enabled, OVDD = 1.8V 100 Ω
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) LTM2173-14 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Analog Supply Voltage (Note 10) l 1.7 1.8 1.9 V OVDD Output Supply Voltage (Note 10) l 1.7 1.8 1.9 V IVDD Analog Supply Current Sine Wave Input l 189 205 mA IOVDD Digital Supply Current 2-Lane Mode, 1.75mA Mode l 25 29 mA 2-Lane Mode, 3.5mA Mode l 47 52 mA PDISS Power Dissipation 2-Lane Mode, 1.75mA Mode l 385 421 mW 2-Lane Mode, 3.5mA Mode l 425 462 mW PSLEEP Sleep Mode Power 1 mW PNAP Nap Mode Power 85 mW PDIFFCLK Power Decrease With Single-Ended Encode Mode Enabled 20 mW (No Decrease for Sleep Mode) Rev. A For more information www.analog.com 5 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Timing Diagrams Pin Functions Pin Configuration Table Functional Block Diagram Applications Information Package Description Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Pin Configuration Table Functional Block Diagram Applications Information Converter Operation Analog Input Input Drive Circuits Digital Outputs Data Format Device Programming Modes Grounding and Bypassing Heat Transfer Package Description Revision History Typical Application Related Parts