Datasheet AD8284 (Analog Devices) - 2

制造商Analog Devices
描述Radar Receive Path AFE: 4-Channel MUX with LNA, PGA, AAF, and ADC
页数 / 页28 / 2 — AD8284. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 8/15—Rev. C to …
修订版D
文件格式/大小PDF / 640 Kb
文件语言英语

AD8284. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 8/15—Rev. C to Rev. D. 6/14—Rev. B to Rev. C. 7/13—Rev. A to Rev. B

AD8284 Data Sheet TABLE OF CONTENTS REVISION HISTORY 8/15—Rev C to Rev D 6/14—Rev B to Rev C 7/13—Rev A to Rev B

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AD8284 Data Sheet TABLE OF CONTENTS
Features .. 1 Clock Jitter Considerations ... 16 Applications ... 1 SDI and SDO Pins .. 16 Functional Block Diagram .. 1 SCLK Pin ... 16 General Description ... 1 CS Pin... 16 Revision History ... 2 RBIAS Pin .. 16 Specifications ... 3 Voltage Reference ... 16 AC Specifications .. 3 Power and Ground Recommendations ... 16 Digital Specifications ... 5 Exposed Pad Thermal Heat Slug Recommendations .. 17 Switching Specifications .. 6 Serial Port Interface (SPI) .. 18 Absolute Maximum Ratings ... 7 Hardware Interface ... 18 ESD Caution .. 7 Memory Map .. 20 Pin Configuration and Function Descriptions ... 8 Reading the Memory Map Table .. 20 Typical Performance Characteristics ... 10 Logic Levels ... 20 Theory of Operation .. 12 Reserved Locations .. 20 Radar Receive Path AFE .. 12 Default Values ... 20 Channel Overview .. 13 Application Circuits ... 24 ADC ... 15 Packaging and Ordering Information ... 26 AUX Channel .. 15 Outline Dimensions ... 26 Clock Input Considerations .. 15 Ordering Guide .. 26 Clock Duty Cycle Considerations .. 16 Automotive Products ... 26
REVISION HISTORY 8/15—Rev. C to Rev. D
Changed AD951x/AD952x to AD9515/AD9520-0 .. Throughout Added Table 1; Renumbered Sequential y .. 1
6/14—Rev. B to Rev. C
Changed 80 MSPS to 60 MSPS .. Throughout Changes to Table 1 .. 3 Changed 6.25 to 8.33, Clock Pulse Width High Parameter, Clock Pulse Width Low Parameter, and Data Setup Time Parameter, Table 3 ... 6
7/13—Rev. A to Rev. B
Changes to Input Resistance and Power-Down Dissipation Parameters; Table 1 ... 3 Updated Outline Dimensions ... 26 Changes to Ordering Guide .. 26
1/13—Rev. 0 to Rev. A
Changes to Figure 16 .. 14
10/12—Revision 0: Initial Version
Rev. D | Page 2 of 28 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing and Switching Diagram Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Radar Receive Path AFE Channel Overview Multiplexer Low Noise Amplifier Recommendation Antialiasing Filter Saturation Flag ADC AUX Channel Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations SDI and SDO Pins SCLK Pin CS Pin RBIAS Pin Voltage Reference Power and Ground Recommendations Exposed Pad Thermal Heat Slug Recommendations Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Caution Logic Levels Reserved Locations Default Values Application Circuits Packaging and Ordering Information Outline Dimensions Ordering Guide Automotive Products