Datasheet AD9650-EP (Analog Devices) - 5

link to page 5 link to page 5 link to page 5 link to page 5
Data Sheet AD9650-EP Parameter Temperature Min Typ Max Unit
LOGIC INPUT (CSB)1 High Level Input Voltage Full 1.22 2.1 V Low Level Input Voltage Full 0 0.6 V High Level Input Current Full −10 +10 µA Low Level Input Current Full 40 132 µA Input Resistance Full 26 kΩ Input Capacitance Full 2 pF LOGIC INPUT (SCLK/DFS)2 High Level Input Voltage Full 1.22 2.1 V Low Level Input Voltage Full 0 0.6 V High Level Input Current (VIN = 1.8 V) Full −92 −135 µA Low Level Input Current Full −10 +10 µA Input Resistance Full 26 kΩ Input Capacitance Full 2 pF LOGIC INPUT/OUTPUT (SDIO/DCS)1 High Level Input Voltage Full 1.22 2.1 V Low Level Input Voltage Full 0 0.6 V High Level Input Current Full −10 +10 µA Low Level Input Current Full 38 128 µA Input Resistance Full 26 kΩ Input Capacitance Full 5 pF LOGIC INPUTS (OEB, PDWN)2 High Level Input Voltage Full 1.22 2.1 V Low Level Input Voltage Full 0 0.6 V High Level Input Current (VIN = 1.8 V) Full −90 −134 µA Low Level Input Current Full −10 +10 µA Input Resistance Full 26 kΩ Input Capacitance Full 5 pF DIGITAL OUTPUTS CMOS Mode—DRVDD = 1.8 V High Level Output Voltage IOH = 50 µA Full 1.79 V IOH = 0.5 mA Full 1.75 V Low Level Output Voltage IOL = 1.6 mA Full 0.2 V IOL = 50 µA Full 0.05 V LVDS Mode—DRVDD = 1.8 V Differential Output Voltage (VOD) ANSI Mode Full 290 345 400 mV Reduced Swing Mode Full 160 200 230 mV Output Offset Voltage (VOS) ANSI Mode Full 1.15 1.25 1.35 V Reduced Swing Mode Full 1.15 1.25 1.35 V 1 Pul up. 2 Pull down. Rev. 0 | Page 5 of 12 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications ADC DC Specifications ADC AC Specifications Digital Specifications Switching Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Characteristics ESD Caution Pin Configuration and Function Descriptions Outline Dimensions Ordering Guide