Datasheet ADL5331 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | 1 MHz to 1.2 GHz VGA with 30 dB Gain Control Range |
| 页数 / 页 | 15 / 7 — Data Sheet. ADL5331. VGAIN = 1.4V. VGAIN = 1.2V. TIA. VGAIN = 1.0V. R ADO … |
| 修订版 | A |
| 文件格式/大小 | PDF / 711 Kb |
| 文件语言 | 英语 |
Data Sheet. ADL5331. VGAIN = 1.4V. VGAIN = 1.2V. TIA. VGAIN = 1.0V. R ADO 5. VGAIN = 0.8V. dBm). IFFE. AND L. IP3 (. VGAIN = 0.6V. ), 5. URCE
该数据表的模型线
文件文字版本
Data Sheet ADL5331 40 25 20 VGAIN = 1.4V 35 L 15 VGAIN = 1.2V TIA 30 10 EN VGAIN = 1.0V R ADO 5 VGAIN = 0.8V dBm) IFFE 25 D 0 AND L IP3 ( 0Ω VGAIN = 0.6V O ), 5 –5 20 URCE VGAIN = 0.4V (dB SO –10 IN VGAIN = 0.2V 15 GA –15 –20 VGAIN = 0V 10 –25 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4
009
50 500 1000
012
VGAIN (V)
07593-
FREQUENCY (MHz)
07593- Figure 9. Output IP3 vs. VGAIN at 900 MHz Figure 12. Gain vs. Frequency (Differential 100 Ω Output Load)
–148 100MHz –150 400MHz 900MHz t1: 2.24µs –152 ) t2: 1.2µs Hz Δt: –1.04µs 1/Δt: –961.5kHz –154 2 MEAN(C1) 1.358V ISE (dBm/ AMPL(C1) 3.36V NO –156 AMPL(C2) 900mV –158 –160
010 028
CH2 500mV M 2.0µs 25.0MS/s 40.0ns/pt 0.1 0.3 0.5 0.7 0.9 1.1 1.3 CH3 200mV Ω A CH1 150mV
07593-
VGAIN (V)
07593- Figure 10. Step Response of Gain Control Input Figure 13. Output Noise Spectral Density vs. VGAIN
30 25 20 L V 15 GAIN = 1.4V TIA V EN GAIN = 1.2V AD 10 R O 5 VGAIN = 1.0V IFFE D 0 V AND L GAIN = 0.8V 0Ω –5 ), 5 VGAIN = 0.6V URCE –10 (dB SO VGAIN = 0.4V IN –15 GA VGAIN = 0.2V –20 –25 VGAIN = 0V –3050 500 1000
011
FREQUENCY (MHz)
07593- Figure 11. Gain vs. Frequency (Differential 50 Ω Output Load) Rev. A | Page 7 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS GAIN CONTROL INPUT CMTS TRANSMIT APPLICATION Interfacing to AD9789 INTERFACING TO AN IQ MODULATOR SOLDERING INFORMATION EVALUATION BOARD SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE
009
50 500 1000
012
VGAIN (V)
07593-
FREQUENCY (MHz)
07593- Figure 9. Output IP3 vs. VGAIN at 900 MHz Figure 12. Gain vs. Frequency (Differential 100 Ω Output Load)
–148 100MHz –150 400MHz 900MHz t1: 2.24µs –152 ) t2: 1.2µs Hz Δt: –1.04µs 1/Δt: –961.5kHz –154 2 MEAN(C1) 1.358V ISE (dBm/ AMPL(C1) 3.36V NO –156 AMPL(C2) 900mV –158 –160
010 028
CH2 500mV M 2.0µs 25.0MS/s 40.0ns/pt 0.1 0.3 0.5 0.7 0.9 1.1 1.3 CH3 200mV Ω A CH1 150mV
07593-
VGAIN (V)
07593- Figure 10. Step Response of Gain Control Input Figure 13. Output Noise Spectral Density vs. VGAIN
30 25 20 L V 15 GAIN = 1.4V TIA V EN GAIN = 1.2V AD 10 R O 5 VGAIN = 1.0V IFFE D 0 V AND L GAIN = 0.8V 0Ω –5 ), 5 VGAIN = 0.6V URCE –10 (dB SO VGAIN = 0.4V IN –15 GA VGAIN = 0.2V –20 –25 VGAIN = 0V –3050 500 1000
011
FREQUENCY (MHz)
07593- Figure 11. Gain vs. Frequency (Differential 50 Ω Output Load) Rev. A | Page 7 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS GAIN CONTROL INPUT CMTS TRANSMIT APPLICATION Interfacing to AD9789 INTERFACING TO AN IQ MODULATOR SOLDERING INFORMATION EVALUATION BOARD SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE