Datasheet LTM4664 (Analog Devices)

LTM4664 54VIN Dual 25A, Single 50A µModule Regulator with Digital Power System Management
FEATURES DESCRIPTION
n
Complete 48V Input to Low Voltage Dual 25A Supply
The LTM®4664 is a complete non-isolated 48V input high
that Can Scale to 300A
efficiency step-down µModule® regulator with dual 25A n Dual Analog Loops with Digital Interface for outputs. The switching controllers, power MOSFETs, inductors Compensation, Control and Monitoring and supporting components are included. Only external n Input Voltage Range: 30V to 58V capacitors are needed to complete the design. Operating over n Output Voltage Range: 0.5V to 1.5V a 30V to 58V input voltage range, the LTM4664 supports an n ±3% Output Current Readback Accuracy (–20° to 125°C) output voltage of 0.5V to 1.5V at up to 75W. An intermediate n 88% Efficiency for 48V to 1V at 50A output at 25% • VIN is also available. The LTM4664 product n ±0.5% Output Voltage Accuracy Over Temperature video is available on the website. n 400kHz PMBus-Compliant I2C Serial Interface The LTM4664 dual 25A regulators utilize digitally program- n 16mm × 16mm × 7.72mm BGA Package mable analog control loops, precision data acquisition cir- cuitry and EEPROM with ECC. The LTM4664’s 2-wire serial
APPLICATIONS
interface allows the 25A outputs to be margined, tuned n 48V Systems and ramped up and down at programmable slew rates and n Computer and Networking Equipment sequencing delay times. True input current sense, output n Electronic Test Equipment currents and voltages, input and output power, tempera- n Storage Systems tures, uptime and peak values are all readable. Click to view associated TechClip Videos. All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6144194, 6177787, 6580258, 7420359, 8163643. Licensed under U.S. Patent 7000125 and other related patents worldwide.
TYPICAL APPLICATION 48V to VCORE at 50A 48V to 1V at 50A
91 CER 48V
4:1 VOLTAGE DIVIDER
90 INTVCCS1 CER PINS NOT SHOWN: CFLY1 CBULK CFLY2 89 VOUT2_SET, OVP_TRIP, VP_SET, INSNSS2+, INSNSS2–, 10k UVS1, UVS2, HYS_PRGM1, HYS_PRGM2, TIMERS1, 88 ON/OFF TIMERS2, INSNSS1+, INSNSS1–, FAULTS1, FAULTS2 87 INTVCC SW4 SW3 SW2 SW1 V INS2 V OUT1 V INS1 86 V INS2F PGOODS2 RUNS2 RUNS1 10k PGOODS2 PGOODS1 PGOODVCORE 85 V PGOOD_C0 OUT2 VOUT2 EFFICIENCY (%) 84 SWC0 CER FREQS1 VCORE50A 83 CBULK VOUTC0 RFREQS1 FREQS2 RFREQS2 82 C INTV OUT1 C CCS1 GND OUT3 INTVCCS1 81 4.7µF SGND_C0_C1 EXTV + 80 V CCS1 V _C0 OUT2 OSNS 0 5 10 15 20 25 30 35 40 45 50 EXTVCCS2 V – LOAD OSNS _C0 V 1µF INTVCCS2 DD33 INTV LTM4664 4664 TA01b CCS2 PGOOD_C1 PGOODVCORE 4.7µF OUTPUT CURRENT (A) 10k IN+ SWC1 VOUT2 IN– VOUTC1 CER VINS3_C0 C 10k OUT3 COUT4 V GND INS3_C1 SGND_C0_C1 SYNC + 10k 10k 10k 10k V _C1 SHARECLK OSNS SCL V – OSNS _C1 SDA TV CC ALERT ASEL COMP_C1b COMP_C0b COMP_C0a COMP_C1a RUN_C0 RUN_C1 V DD33 IN V DD25 PGOODS2 INTVCC RSEL VDD25
TWO PHASE 50A SECTION
COMPH0 4.7µF PINS NOT SHOWN: COMPH1 VOUTC0_CFG, VTRIMC0_CFG, VOUTC1_CFG, VTRIMC1_CFG, FSWPH_CFG, TSNSC0a, TSNSC0b, TSNSC1a, TSNSC1b, PWM_C0, VDD33 PWM_C1, GL_C0, GL_C1, PHFLT_C0, PHFLT_C1, EXTVCC PGOODS2 4664 TA01a Rev. 0 Document Feedback For more information www.analog.com 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics 4:1 Divider Block Diagram Dual 25A Power System Management (PSM) Block Diagram 4:1 Divider Operation 4:1 Divider Description Main Control INTVCCS1,2/EXTVCCS1,2 Power Start-Up and Shutdown Fault Protection and Thermal Shutdown High Side Current Sensing Frequency Selection Power Good and UV (PGOODSn and UVSn pins) Additional Overvoltage Protection 4:1 Divider Application Information Voltage Divider Pre-Balance Before Switching Overcurrent Protection Window Comparator Programming Effective Open Loop Output Resistance and Load Regulation Undervoltage Lockout Fault Response and Timer Programming Design Example Dual 25A PSM Operation PSM Section Overview, Major Features EEPROM with ECC Power-Up and Initialization Soft-Start Time-Based Sequencing Voltage-Based Sequencing Shutdown Light-Load Current Operation Switching Frequency and Phase PWM Loop Compensation Output Voltage Sensing INTVCC/EXTVCC Power Output Current Sensing and Sub Milliohm DCR Current Sensing Input Current Sensing PolyPhase Load Sharing External/Internal Temperature Sense RCONFIG (Resistor Configuration) Pins Fault Detection and Handling Status Registers and ALERT Masking Mapping Faults to FAULT Pins Power Good Pins CRC Protection Serial Interface Communication Protection Device Addressing Responses to VOUT and IIN/IOUT Faults Output Overvoltage Fault Response Output Undervoltage Response Peak Output Overcurrent Fault Response Responses to Timing Faults Responses to VIN OV Faults Responses to OT/UT Faults Internal Overtemperature Fault Response External Overtemperature and Undertemperature Fault Response Responses to Input Overcurrent and Output Undercurrent Faults Responses to External Faults Fault Logging Bus Timeout Protection Similarity Between PMBus, SMBus and I2C 2-Wire Interface PMBus Serial Digital Interface Figure 11 thru Figure 28 PMBus Protocols PMBus Command Summary PMBus Commands Dual 25A PSM Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Output Current Limit Programming Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization Input Current Sense Amplifier Programmable Loop Compensation Checking Transient Response PolyPhase® Configuration Connecting the USB to I2C/SMBus/PMBus Controller to the LTM4664 In-System LTpowerPlay: An Interactive GUI for Digital Power PMBus Communication and Command Processing Thermal Considerations and Output Current Derating Table 10 and Table 11: Output Current Derating (Based on Demo Board) Dual 25A PSM Applications Information–Derating Curves EMI Performance Safety Considerations Layout Checklist/Example Typical Applications PMBus Command Details Addressing and Write Protect General Configuration Commands On/Off/Margin PWM Configuration Voltage Input Voltage and Limits Output Voltage and Limits Output Current and Limits Input Current and Limits Temperature External Temperature Calibration Timing Timing—On Sequence/Ramp Timing—Off Sequence/Ramp Precondition for Restart Fault Response Fault Responses All Faults Fault Responses Input Voltage Fault Responses Output Voltage Fault Responses Output Current Fault Responses IC Temperature Fault Responses External Temperature Fault Sharing Fault Sharing Propagation Fault Sharing Response Scratchpad Identification Fault Warning and Status Telemetry NVM Memory Commands Store/Restore Fault Logging Block Memory Write/Read Package Description Typical Applications Related Parts