Datasheet VEML6035 (Vishay) - 2

VEML6035
www.vishay.com Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
(Tamb = 25 °C, unless otherwise specified)
PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT
Supply voltage VDD 0 4 V Operation temperature range Tamb -25 +85 °C Storage temperature range Tstg -25 +85 °C Total power dissipation Tamb ≤ 25 °C Ptot - 50 mW Junction temperature Tj - 85 °C
BASIC CHARACTERISTICS
(Tamb = 25 °C, unless otherwise specified)
PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT
Supply voltage VDD 1.7 1.8 3.6 V Shut down current (2) VDD = 1.8 V Isd - 0.5 - μA VDD = 1.8 V, CHANNEL_EN = 0 (ALS only) IDD - 170 - μA Operation mode current (1) VDD = 1.8 V, CHANNEL_EN = 1 I (ALS and WHITE) DD - 225 - μA I2C clock rate range fSCL 10 - 400 kHz I2C bus input H-level range VDD = 1.8 V Vih 1.2 - VDD V I2C bus input L-level range VDD = 1.8 V Vil 0 - 0.4 V Output low voltage SDA 3 mA sink current Vol 0 - 0.4 V Digital resolution (LSB count) With GAIN = 1, DG = 1, SENS = 0 - 0.0004 - lx/step Detectable minimum illuminance (3) With GAIN = 1, DG = 1, SENS = 0 EV min. - 0.004 - lx Detectable maximum illuminance With GAIN = 0, DG = 0, SENS = 1 EV max. - 6710 - lx Dark offset (4) With GAIN = 1, DG = 1, SENS = 0 - - 5 step
Notes
(1) Light source: white LED (2) Light conditions: dark (3) The part has a typical zero offset of 10 counts at the set max. resolution of 0.0004lx/step, so the first valid measurement will be at an illuminance of 0.004lx (typ.) (4) The dark offset can be above or below 0
CIRCUIT BLOCK DIAGRAM
VDD Temperature compensation SCL Low pass filter Output buffer SDA with Timing I2C interface controller INT Oscillator GND Fig. 1 - Block Diagram Rev. 1.0, 12-Mar-2019
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