Datasheet ADN2892 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 3.3 V 4.25 Gb/s Limiting Amplifier |
| 页数 / 页 | 16 / 6 — ADN2892. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. HO T. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 458 Kb |
| 文件语言 | 英语 |
ADN2892. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. HO T. _OI S. D_C. D_V. AVCC 1. 12 DRVCC. PIN 2. 11 OUTP. TOP VIEW. NIN 3
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文件文字版本
ADN2892 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DE HO T UT CH A CC L _OI S UE D_C D_V Q P P RS S 16 15 14 13 AVCC 1 12 DRVCC PIN 2 ADN2892 11 OUTP TOP VIEW NIN 3 10 OUTN (Not to Scale) AVEE 4 9 DRVEE 5 6 7 8 L V E IN _S _ LOS HRADJ T BW LOS NOTES 1. THERE IS AN EXPOSED PAD ON THE BOTTOM OF
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THE PACKAGE THAT MUST BE CONNECTED TO THE GND PLANE WITH FILLED VIAS.
04986- Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic I/O Type1 Description
1 AVCC P Analog Power Supply. 2 PIN AI Differential Data Input, Positive Port, 50 Ω On-Chip Termination. 3 NIN AI Differential Data Input, Negative Port, 50 Ω On-Chip Termination. 4 AVEE P Analog Ground. 5 THRADJ AO LOS Threshold Adjust Resistor. 6 BW_SEL DI With one 100 kΩ on-chip, pull-up resistor, BW_SEL = 0 for 1×/2× FC, BW_SEL = 1 for 4× FC. 7 LOS_INV DI With one 100 kΩ on-chip, pull-down resistor, LOS_INV = 1 inverts the LOS output to be active low for SFF. 8 LOS DO LOS Detector Output, Open Collector. 9 DRVEE P Output Buffer Ground. 10 OUTN DO Differential Data Output, CML, Negative Port, 50 Ω, On-Chip Termination. 11 OUTP DO Differential Data Output, CML, Positive Port, 50 Ω, On-Chip Termination. 12 DRVCC P Output Buffer Power Supply. 13 SQUELCH DI Disable Outputs, 100 kΩ On-Chip, Pull-Down Resistor. 14 RSSI_OUT AO Average Current Output. 15 PD_VCC P Power Input for RSSI Measurement. 16 PD_CATHODE AO Photodiode Bias Voltage. Exposed Pad Pad P Connect to Ground. 1 P = power; DI = digital input; DO = digital output; AI = analog input; and AO = analog output. Rev. C | Page 6 of 16 Document Outline Features Applications General Description Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Limiting Amplifier Input Buffer CML Output Buffer Loss-of-Signal (LOS) Detector Received Signal Strength Indicator (RSSI) Squelch Mode BW_SEL (Bandwidth Selection) Mode LOS_INV (Lose of Signal_Invert) Mode Applications Information PCB Design Guidelines Output Buffer Power Supply and Ground Planes PCB Layout Soldering Guidelines for the LFCSP Pad Coating and Pb-Free Soldering Outline Dimensions Ordering Guide
002
THE PACKAGE THAT MUST BE CONNECTED TO THE GND PLANE WITH FILLED VIAS.
04986- Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic I/O Type1 Description
1 AVCC P Analog Power Supply. 2 PIN AI Differential Data Input, Positive Port, 50 Ω On-Chip Termination. 3 NIN AI Differential Data Input, Negative Port, 50 Ω On-Chip Termination. 4 AVEE P Analog Ground. 5 THRADJ AO LOS Threshold Adjust Resistor. 6 BW_SEL DI With one 100 kΩ on-chip, pull-up resistor, BW_SEL = 0 for 1×/2× FC, BW_SEL = 1 for 4× FC. 7 LOS_INV DI With one 100 kΩ on-chip, pull-down resistor, LOS_INV = 1 inverts the LOS output to be active low for SFF. 8 LOS DO LOS Detector Output, Open Collector. 9 DRVEE P Output Buffer Ground. 10 OUTN DO Differential Data Output, CML, Negative Port, 50 Ω, On-Chip Termination. 11 OUTP DO Differential Data Output, CML, Positive Port, 50 Ω, On-Chip Termination. 12 DRVCC P Output Buffer Power Supply. 13 SQUELCH DI Disable Outputs, 100 kΩ On-Chip, Pull-Down Resistor. 14 RSSI_OUT AO Average Current Output. 15 PD_VCC P Power Input for RSSI Measurement. 16 PD_CATHODE AO Photodiode Bias Voltage. Exposed Pad Pad P Connect to Ground. 1 P = power; DI = digital input; DO = digital output; AI = analog input; and AO = analog output. Rev. C | Page 6 of 16 Document Outline Features Applications General Description Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Limiting Amplifier Input Buffer CML Output Buffer Loss-of-Signal (LOS) Detector Received Signal Strength Indicator (RSSI) Squelch Mode BW_SEL (Bandwidth Selection) Mode LOS_INV (Lose of Signal_Invert) Mode Applications Information PCB Design Guidelines Output Buffer Power Supply and Ground Planes PCB Layout Soldering Guidelines for the LFCSP Pad Coating and Pb-Free Soldering Outline Dimensions Ordering Guide