Datasheet ST7LITEUSx (STMicroelectronics) - 4
| 制造商 | STMicroelectronics |
| 描述 | 8-bit MCU with single voltage Flash memory, ADC, timers. ST7ULTRALITE (ST7LITEUS2, ST7LITEUS5) |
| 页数 / 页 | 108 / 4 — ST7LITEUSx. 1 INTRODUCTION. Figure 1. General block diagram |
| 文件格式/大小 | PDF / 889 Kb |
| 文件语言 | 英语 |
ST7LITEUSx. 1 INTRODUCTION. Figure 1. General block diagram
该数据表的模型线
- ST7FLITEUS2B3 ST7FLITEUS2B6 ST7FLITEUS2M3 ST7FLITEUS2M3TR ST7FLITEUS2M6 ST7FLITEUS2M6TR ST7FLITEUS2U3TR ST7FLITEUS2U6TR ST7FLITEUS5B3 ST7FLITEUS5B6 ST7FLITEUS5M3 ST7FLITEUS5M3TR ST7FLITEUS5M6 ST7FLITEUS5M6TR ST7FLITEUS5U3 ST7FLITEUS5U3TR ST7FLITEUS5U6 ST7FLITEUS5U6TR ST7FLITEUSICD ST7PLITEUS2B3 ST7PLITEUS2B6 ST7PLITEUS2M3 ST7PLITEUS2M3TR ST7PLITEUS2M6 ST7PLITEUS2M6TR ST7PLITEUS2U3TR ST7PLITEUS2U6TR ST7PLITEUS5B3 ST7PLITEUS5B6 ST7PLITEUS5M3 ST7PLITEUS5M3TR ST7PLITEUS5M6 ST7PLITEUS5M6TR ST7PLITEUS5U3 ST7PLITEUS5U3TR ST7PLITEUS5U6 ST7PLITEUS5U6TR
文件文字版本
ST7LITEUSx 1 INTRODUCTION
The ST7ULTRALITE is a member of the ST7 mi- software developers, enabling the design of highly crocontroller family. All ST7 devices are based on efficient and compact application code. In addition a common industry-standard 8-bit core, featuring to standard 8-bit data management, all ST7 micro- an enhanced instruction set. controllers feature true bit manipulation, 8x8 un- The ST7ULTRALITE features FLASH memory signed multiplication and indirect addressing with byte-by-byte In-Circuit Programming (ICP) modes. and In-Application Programming (IAP) capability. For easy reference, all parametric data are located Under software control, the ST7ULTRALITE de- in section 12 on page 67. vice can be placed in WAIT, SLOW, or HALT The devices feature an on-chip Debug Module mode, reducing power consumption when the ap- (DM) to support in-circuit debugging (ICD). For a plication is in idle or standby state. description of the DM registers, refer to the ST7 The enhanced instruction set and addressing ICC Protocol Reference Manual. modes of the ST7 offer both power and flexibility to
Figure 1. General block diagram
Internal AWU RC OSC Clock 8-MHz RC OSC External LITE TIMER Clock with WATCHDOG LVD VDD POWER PORT A SUPPLY VSS ADDRESS AND DATA BUS 12-BIT AUTO- PA5:0 PA3 / RESET CONTROL RELOAD TIMER (6 bits) 8-BIT CORE ALU 10-BIT ADC 1K Byte FLASH MEMORY RAM (128 Bytes) 4/108 1
The ST7ULTRALITE is a member of the ST7 mi- software developers, enabling the design of highly crocontroller family. All ST7 devices are based on efficient and compact application code. In addition a common industry-standard 8-bit core, featuring to standard 8-bit data management, all ST7 micro- an enhanced instruction set. controllers feature true bit manipulation, 8x8 un- The ST7ULTRALITE features FLASH memory signed multiplication and indirect addressing with byte-by-byte In-Circuit Programming (ICP) modes. and In-Application Programming (IAP) capability. For easy reference, all parametric data are located Under software control, the ST7ULTRALITE de- in section 12 on page 67. vice can be placed in WAIT, SLOW, or HALT The devices feature an on-chip Debug Module mode, reducing power consumption when the ap- (DM) to support in-circuit debugging (ICD). For a plication is in idle or standby state. description of the DM registers, refer to the ST7 The enhanced instruction set and addressing ICC Protocol Reference Manual. modes of the ST7 offer both power and flexibility to
Figure 1. General block diagram
Internal AWU RC OSC Clock 8-MHz RC OSC External LITE TIMER Clock with WATCHDOG LVD VDD POWER PORT A SUPPLY VSS ADDRESS AND DATA BUS 12-BIT AUTO- PA5:0 PA3 / RESET CONTROL RELOAD TIMER (6 bits) 8-BIT CORE ALU 10-BIT ADC 1K Byte FLASH MEMORY RAM (128 Bytes) 4/108 1