Datasheet LT8365 (Analog Devices) - 7

LT8365
PIN FUNCTIONS EN/UVLO:
Shutdown and Undervoltage Detect Pin. The
RT:
A resistor from this pin to the exposed pad GND cop- LT8365 is shut down when this pin is low and active per (near FBX) programs switching frequency. when this pin is high. Below an accurate 1.6V threshold,
SS:
Soft-Start Pin. Connect a capacitor from this pin to the part enters undervoltage lockout and stops switching. GND copper (near FBX) to control the ramp rate of inductor This allows an undervoltage lockout (UVLO) threshold to current during converter start-up. SS pin charging current be programmed for system input voltage by resistively is 2μA. An internal 220Ω MOSFET discharges this pin dividing down system input voltage to the EN/UVLO pin. during shutdown or fault conditions. An 80mV pin hysteresis ensures part switching resumes when the pin exceeds 1.68V. EN/UVLO pin voltage below
SYNC/MODE:
This pin allows five selectable modes for 0.2V reduces VIN current below 1µA. If shutdown and optimization of performance. UVLO features are not required, the pin can be tied directly
SYNC/MODE PIN INPUT CAPABLE MODE(S) OF OPERATION
to system input. (1) GND or <0.14V Burst
VIN:
Input Supply. This pin must be locally bypassed. Be (2) External Clock Pulse-Skipping/Sync sure to place the positive terminal of the input capacitor as (3) 100k Resistor to GND Burst/SSFM close as possible to the VIN pin, and the negative terminal (4) Float (Pin Open) Pulse-Skipping as close as possible to the exposed pad PGND copper (5) INTVCC or >1.7V Pulse-Skipping/SSFM (near EN/UVLO). where the selectable modes of operation are:
INTVCC:
Regulated 3.8V Supply for Internal Loads. The INTV Burst = low IQ, low output ripple operation at light loads CC pin must be bypassed with a 1µF low ESR ceramic capacitor to GND. No additional components or loading is Pulse-skipping = skipped pulse(s) at light load (aligned to clock) allowed on this pin. INTV Sync = switching frequency synchronized to external clock CC draws power from the BIAS pin if 4.4V ≤ BIAS ≤ V SSFM = Spread Spectrum Frequency Modulation for low EMI. IN, otherwise INTVCC is powered by the VIN pin.
SW1, SW2 (SW):
Output of the Internal Power Switch.
NC:
No Internal Connection. Leave this pin open. Minimize the metal trace area connected to these pins to reduce EMI.
BIAS:
Second Input Supply for Powering INTVCC. Removes the majority of INTV
PGND,GND:
Power Ground and Signal Ground for the CC current from the VIN pin to improve efficiency when 4.4V ≤ BIAS ≤ V IC. The package has an exposed pad underneath the IC IN. If unused, tie the pin to GND. which is the best path for heat out of the package. The pin should be soldered to a continuous copper ground plane
VC:
Error Amplifier Output Pin. Tie external compensation under the device to reduce die temperature and increase network to this pin. the power capability of the LT8365. Connect power ground
FBX:
Voltage Regulation Feedback Pin for Positive or Nega- components to the exposed pad copper exiting near the EN/ tive Outputs. Connect this pin to a resistor divider between UVLO and SW pins. Connect signal ground components to the output and the exposed pad GND copper (near FBX). the exposed pad copper exiting near the VC and FBX pins. FBX reduces the switching frequency during start-up and fault conditions when FBX is close to 0V. Rev. 0 For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts