Datasheet BLP05H9S500P (Ampleon) - 8
制造商 | Ampleon |
描述 | Power LDMOS transistor |
页数 / 页 | 13 / 8 — BLP05H9S500P. Power LDMOS transistor. 8. Package outline. Fig 13. Package … |
文件格式/大小 | PDF / 1.6 Mb |
文件语言 | 英语 |
BLP05H9S500P. Power LDMOS transistor. 8. Package outline. Fig 13. Package outline OMP-780-4F-1 (sheet 1 of 2)
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BLP05H9S500P Power LDMOS transistor 8. Package outline
OMP-780-4F-1 (18.01) (15.44) (2.15) 8.85 E 0.10 (4) 0.75 ( ) A 3 4 L 0.05 A R1.38 0 2. 16.00 ) 0 ) 1 4 7 ( 8 B 0 4 . 6 7. 6 7 4 9. 9 9 ( . 9 5 1 P2.00 0.1Z R0.16 max. 1 metal protrusion 4x 0.10 2 (ground) in corners (2) 3.85 (3) L 0.25 B 1.57 (5) 20.75(1) L 0.05 B 0.08 + 0.22 3.92 B0.05 R1.00 - 0.03 R0.32 B 20.57 0. ( 20) compound rim all around the perimeter of the heatsink 8 5 . 7 5 . ni in M M R0.60(4x) pin 5 (6) Min. 15.5 Min. 18.5 0 Package outline drawing: Tolerances unless otherwise stated: Revision: Dimension: B 0.05 Angle: B 1° Revision date: 3/1/2018 units in mm. OMP-780-4F-1 Third angle projection Sheet 1 of 2
Fig 13. Package outline OMP-780-4F-1 (sheet 1 of 2)
BLP05H9S500P All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2019. All rights reserved.
Product data sheet Rev. 1 — 10 September 2019 8 of 13
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Test information 7.1 Ruggedness in class-AB operation 7.2 Impedance information 7.3 Application circuit 7.4 Graphical data 8. Package outline 9. Handling information 10. Abbreviations 11. Revision history 12. Legal information 12.1 Data sheet status 12.2 Definitions 12.3 Disclaimers 12.4 Trademarks 13. Contact information 14. Contents