Datasheet ADAU1361 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL |
| 页数 / 页 | 80 / 3 — Data Sheet. ADAU1361. REVISION HISTORY 8/2018—Rev. C to Rev. D. … |
| 修订版 | D |
| 文件格式/大小 | PDF / 1.1 Mb |
| 文件语言 | 英语 |
Data Sheet. ADAU1361. REVISION HISTORY 8/2018—Rev. C to Rev. D. 9/2010—Rev. B to Rev. C. 5/2010—Rev. A to Rev. B
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Data Sheet ADAU1361 REVISION HISTORY 8/2018—Rev. C to Rev. D
Changes to Input Signal Paths Section and Figure 31 .. 29 Changed tSODM to tSOD, Table 7 .. 11 Changes to Figure 32 and Figure 33 ... 30 Changes to tSOD Parameter, Table 7 ... 11 Changes to ADC Full-Scale Level Section ... 31 Changes to Figure 3 ... 12 Change to Automatic Level Control (ALC) Section .. 32 Changes to Output Signal Paths Section .. 35
9/2010—Rev. B to Rev. C
Changes to Headphone Output Section ... 36 Changes to Figure 1 ... 1 Changes to Jack Detection Section, Pop-and-Click Suppression Section, and Line Outputs Section ... 37
5/2010—Rev. A to Rev. B
Changes to Control Ports Section and I2C Port Section .. 38 Changes to Burst Mode Writing and Reading Section .. 38 Added Burst Mode Writing and Reading Section .. 38 Changes to Table 26 .. 45 Changes to SPI Port Section .. 41 Change to Table 43 .. 58 Changes to Serial Data Input/Output Ports Section, Table 24, Added R67: Dejitter Control, 16,438 (0x4036) Section ... 73 and Table 25 ... 42 Added Figure 56 .. 42
12/2009—Rev. 0 to Rev. A
Changes to Figure 60 and Figure 61 ... 43 Changes to Features Section .. 1 Changes to Table 26 .. 45 Changes to General Description Section ... 1 Changes to R2: Digital Microphone/Jack Detection Control, Changes to Table 1 .. 6 16,392 (0x4008) Section and Table 29 .. 47 Change to Table 5 .. 10 Changes to Table 35 .. 52 Changes to Figure 6 ... 13 Changes to Table 36 .. 53 Changes to Table 10 .. 15 Changes to R15: Serial Port Control 0, 16,405 (0x4015) Changes to Captions of Figure 15, Figure 16, Figure 18, Section and Table 42 ... 57 and Figure 19 ... 18 Change to Table 43 .. 58 Changes to Captions of Figure 21 and Figure 24 .. 19 Changes to Table 44, R18: Converter Control 1, 16,408 Added Figure 22; Renumbered Sequentially ... 19 (0x4018) Section, and Table 45 ... 59 Change to Figure 25 .. 20 Changes to Table 53, R27: Playback L/R Mixer Right (Mixer 6) Change to Figure 26 .. 21 Line Output Control, 16,417 (0x4021) Section, and Table 54... 65 Change to Figure 27 .. 22 Changes to Table 55, R29: Playback Headphone Left Volume Change to Theory of Operation Section .. 23 Control, 16,419 (0x4023) Section, and Table 56 ... 66 Changes to Power Reduction Modes Section and Changes to R42: Jack Detect Pin Control, 16,433 (0x4031) Case 1: PLL Is Bypassed Section ... 24 Section and Table 69 ... 73 Changes to PLL Lock Acquisition Section ... 25 Changes to Core Clock Section ... 26
1/2009—Revision 0: Initial Version
Rev. D | Page 3 of 80 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Analog Performance Specifications Power Supply Specifications Typical Current Consumption Typical Power Management Measurements Digital Filters Digital Input/Output Specifications Digital Timing Specifications Digital Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics System Block Diagrams Theory of Operation Startup, Initialization, and Power Power-Up Sequence Power Reduction Modes Digital Power Supply Input/Output Power Supply Clock Generation and Management Case 1: PLL Is Bypassed Case 2: PLL Is Used PLL Lock Acquisition Clocking and Sampling Rates Core Clock Sampling Rates PLL Integer Mode Fractional Mode Record Signal Path Input Signal Paths Analog Microphone Inputs Analog Line Inputs Digital Microphone Input Microphone Bias Analog-to-Digital Converters ADC Full-Scale Level Digital ADC Volume Control High-Pass Filter Automatic Level Control (ALC) ALC Parameters Noise Gate Function Playback Signal Path Output Signal Paths Routing Flexibility Headphone Output Capless Headphone Configuration Headphone Output Power-Up/Power-Down Sequencing Ground-Centered Headphone Configuration Jack Detection Pop-and-Click Suppression Line Outputs Control Ports Burst Mode Writing and Reading I2C Port Addressing I2C Read and Write Operations SPI Port Chip Address R/ Subaddress Data Bytes Serial Data Input/Output Ports Applications Information Power Supply Bypass Capacitors GSM Noise Filter Grounding Exposed Pad PCB Design Control Registers Control Register Details R0: Clock Control, 16,384 (0x4000) R1: PLL Control, 16,386 (0x4002) R2: Digital Microphone/Jack Detection Control, 16,392 (0x4008) R3: Record Power Management, 16,393 (0x4009) R4: Record Mixer Left (Mixer 1) Control 0, 16,394 (0x400A) R5: Record Mixer Left (Mixer 1) Control 1, 16,395 (0x400B) R6: Record Mixer Right (Mixer 2) Control 0, 16,396 (0x400C) R7: Record Mixer Right (Mixer 2) Control 1, 16,397 (0x400D) R8: Left Differential Input Volume Control, 16,398 (0x400E) R9: Right Differential Input Volume Control, 16,399 (0x400F) R10: Record Microphone Bias Control, 16,400 (0x4010) R11: ALC Control 0, 16,401 (0x4011) R12: ALC Control 1, 16,402 (0x4012) R13: ALC Control 2, 16,403 (0x4013) R14: ALC Control 3, 16,404 (0x4014) R15: Serial Port Control 0, 16,405 (0x4015) R16: Serial Port Control 1, 16,406 (0x4016) R17: Converter Control 0, 16,407 (0x4017) R18: Converter Control 1, 16,408 (0x4018) R19: ADC Control, 16,409 (0x4019) R20: Left Input Digital Volume, 16,410 (0x401A) R21: Right Input Digital Volume, 16,411 (0x401B) R22: Playback Mixer Left (Mixer 3) Control 0, 16,412 (0x401C) R23: Playback Mixer Left (Mixer 3) Control 1, 16,413 (0x401D) R24: Playback Mixer Right (Mixer 4) Control 0, 16,414 (0x401E) R25: Playback Mixer Right (Mixer 4) Control 1, 16,415 (0x401F) R26: Playback L/R Mixer Left (Mixer 5) Line Output Control, 16,416 (0x4020) R27: Playback L/R Mixer Right (Mixer 6) Line Output Control, 16,417 (0x4021) R28: Playback L/R Mixer Mono Output (Mixer 7) Control, 16,418 (0x4022) R29: Playback Headphone Left Volume Control, 16,419 (0x4023) R30: Playback Headphone Right Volume Control, 16,420 (0x4024) R31: Playback Line Output Left Volume Control, 16,421 (0x4025) R32: Playback Line Output Right Volume Control, 16,422 (0x4026) R33: Playback Mono Output Control, 16,423 (0x4027) R34: Playback Pop/Click Suppression, 16,424 (0x4028) R35: Playback Power Management, 16,425 (0x4029) R36: DAC Control 0, 16,426 (0x402A) R37: DAC Control 1, 16,427 (0x402B) R38: DAC Control 2, 16,428 (0x402C) R39: Serial Port Pad Control, 16,429 (0x402D) R40: Control Port Pad Control 0, 16,431 (0x402F) R41: Control Port Pad Control 1, 16,432 (0x4030) R42: Jack Detect Pin Control, 16,433 (0x4031) R67: Dejitter Control, 16,438 (0x4036) Outline Dimensions Ordering Guide
Changes to Input Signal Paths Section and Figure 31 .. 29 Changed tSODM to tSOD, Table 7 .. 11 Changes to Figure 32 and Figure 33 ... 30 Changes to tSOD Parameter, Table 7 ... 11 Changes to ADC Full-Scale Level Section ... 31 Changes to Figure 3 ... 12 Change to Automatic Level Control (ALC) Section .. 32 Changes to Output Signal Paths Section .. 35
9/2010—Rev. B to Rev. C
Changes to Headphone Output Section ... 36 Changes to Figure 1 ... 1 Changes to Jack Detection Section, Pop-and-Click Suppression Section, and Line Outputs Section ... 37
5/2010—Rev. A to Rev. B
Changes to Control Ports Section and I2C Port Section .. 38 Changes to Burst Mode Writing and Reading Section .. 38 Added Burst Mode Writing and Reading Section .. 38 Changes to Table 26 .. 45 Changes to SPI Port Section .. 41 Change to Table 43 .. 58 Changes to Serial Data Input/Output Ports Section, Table 24, Added R67: Dejitter Control, 16,438 (0x4036) Section ... 73 and Table 25 ... 42 Added Figure 56 .. 42
12/2009—Rev. 0 to Rev. A
Changes to Figure 60 and Figure 61 ... 43 Changes to Features Section .. 1 Changes to Table 26 .. 45 Changes to General Description Section ... 1 Changes to R2: Digital Microphone/Jack Detection Control, Changes to Table 1 .. 6 16,392 (0x4008) Section and Table 29 .. 47 Change to Table 5 .. 10 Changes to Table 35 .. 52 Changes to Figure 6 ... 13 Changes to Table 36 .. 53 Changes to Table 10 .. 15 Changes to R15: Serial Port Control 0, 16,405 (0x4015) Changes to Captions of Figure 15, Figure 16, Figure 18, Section and Table 42 ... 57 and Figure 19 ... 18 Change to Table 43 .. 58 Changes to Captions of Figure 21 and Figure 24 .. 19 Changes to Table 44, R18: Converter Control 1, 16,408 Added Figure 22; Renumbered Sequentially ... 19 (0x4018) Section, and Table 45 ... 59 Change to Figure 25 .. 20 Changes to Table 53, R27: Playback L/R Mixer Right (Mixer 6) Change to Figure 26 .. 21 Line Output Control, 16,417 (0x4021) Section, and Table 54... 65 Change to Figure 27 .. 22 Changes to Table 55, R29: Playback Headphone Left Volume Change to Theory of Operation Section .. 23 Control, 16,419 (0x4023) Section, and Table 56 ... 66 Changes to Power Reduction Modes Section and Changes to R42: Jack Detect Pin Control, 16,433 (0x4031) Case 1: PLL Is Bypassed Section ... 24 Section and Table 69 ... 73 Changes to PLL Lock Acquisition Section ... 25 Changes to Core Clock Section ... 26
1/2009—Revision 0: Initial Version
Rev. D | Page 3 of 80 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Analog Performance Specifications Power Supply Specifications Typical Current Consumption Typical Power Management Measurements Digital Filters Digital Input/Output Specifications Digital Timing Specifications Digital Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics System Block Diagrams Theory of Operation Startup, Initialization, and Power Power-Up Sequence Power Reduction Modes Digital Power Supply Input/Output Power Supply Clock Generation and Management Case 1: PLL Is Bypassed Case 2: PLL Is Used PLL Lock Acquisition Clocking and Sampling Rates Core Clock Sampling Rates PLL Integer Mode Fractional Mode Record Signal Path Input Signal Paths Analog Microphone Inputs Analog Line Inputs Digital Microphone Input Microphone Bias Analog-to-Digital Converters ADC Full-Scale Level Digital ADC Volume Control High-Pass Filter Automatic Level Control (ALC) ALC Parameters Noise Gate Function Playback Signal Path Output Signal Paths Routing Flexibility Headphone Output Capless Headphone Configuration Headphone Output Power-Up/Power-Down Sequencing Ground-Centered Headphone Configuration Jack Detection Pop-and-Click Suppression Line Outputs Control Ports Burst Mode Writing and Reading I2C Port Addressing I2C Read and Write Operations SPI Port Chip Address R/ Subaddress Data Bytes Serial Data Input/Output Ports Applications Information Power Supply Bypass Capacitors GSM Noise Filter Grounding Exposed Pad PCB Design Control Registers Control Register Details R0: Clock Control, 16,384 (0x4000) R1: PLL Control, 16,386 (0x4002) R2: Digital Microphone/Jack Detection Control, 16,392 (0x4008) R3: Record Power Management, 16,393 (0x4009) R4: Record Mixer Left (Mixer 1) Control 0, 16,394 (0x400A) R5: Record Mixer Left (Mixer 1) Control 1, 16,395 (0x400B) R6: Record Mixer Right (Mixer 2) Control 0, 16,396 (0x400C) R7: Record Mixer Right (Mixer 2) Control 1, 16,397 (0x400D) R8: Left Differential Input Volume Control, 16,398 (0x400E) R9: Right Differential Input Volume Control, 16,399 (0x400F) R10: Record Microphone Bias Control, 16,400 (0x4010) R11: ALC Control 0, 16,401 (0x4011) R12: ALC Control 1, 16,402 (0x4012) R13: ALC Control 2, 16,403 (0x4013) R14: ALC Control 3, 16,404 (0x4014) R15: Serial Port Control 0, 16,405 (0x4015) R16: Serial Port Control 1, 16,406 (0x4016) R17: Converter Control 0, 16,407 (0x4017) R18: Converter Control 1, 16,408 (0x4018) R19: ADC Control, 16,409 (0x4019) R20: Left Input Digital Volume, 16,410 (0x401A) R21: Right Input Digital Volume, 16,411 (0x401B) R22: Playback Mixer Left (Mixer 3) Control 0, 16,412 (0x401C) R23: Playback Mixer Left (Mixer 3) Control 1, 16,413 (0x401D) R24: Playback Mixer Right (Mixer 4) Control 0, 16,414 (0x401E) R25: Playback Mixer Right (Mixer 4) Control 1, 16,415 (0x401F) R26: Playback L/R Mixer Left (Mixer 5) Line Output Control, 16,416 (0x4020) R27: Playback L/R Mixer Right (Mixer 6) Line Output Control, 16,417 (0x4021) R28: Playback L/R Mixer Mono Output (Mixer 7) Control, 16,418 (0x4022) R29: Playback Headphone Left Volume Control, 16,419 (0x4023) R30: Playback Headphone Right Volume Control, 16,420 (0x4024) R31: Playback Line Output Left Volume Control, 16,421 (0x4025) R32: Playback Line Output Right Volume Control, 16,422 (0x4026) R33: Playback Mono Output Control, 16,423 (0x4027) R34: Playback Pop/Click Suppression, 16,424 (0x4028) R35: Playback Power Management, 16,425 (0x4029) R36: DAC Control 0, 16,426 (0x402A) R37: DAC Control 1, 16,427 (0x402B) R38: DAC Control 2, 16,428 (0x402C) R39: Serial Port Pad Control, 16,429 (0x402D) R40: Control Port Pad Control 0, 16,431 (0x402F) R41: Control Port Pad Control 1, 16,432 (0x4030) R42: Jack Detect Pin Control, 16,433 (0x4031) R67: Dejitter Control, 16,438 (0x4036) Outline Dimensions Ordering Guide