Datasheet PI6CG33601C (Diodes) - 3

A product Line of Diodes Incorporated
PI6CG33601C Pin Description Cont. Pin # Pin Name Type Description
15 Q0- Output HCSL Differential complementary clock output 16, 31 VDD Power Power supply, nominal 3.3V 18 Q1+ Output HCSL Differential true clock output 19 Q1- Output HCSL Differential complementary clock output Active low input for enabling Q1 pair. This pin has an internal pull- 21 OE1# Input CMOS down. 1 =disable outputs, 0 = enable outputs 22 Q2+ Output HCSL Differential true clock output 23 Q2- Output HCSL Differential complementary clock output 24 OE2# Input CMOS Active low input for enabling Q2 pair. This pin has an internal pull- down. 1 =disable outputs, 0 = enable outputs 26 VDDA Power Power supply for analog circuitry 28 Q3+ Output HCSL Differential true clock output 29 Q3- Output HCSL Differential complementary clock output 30 OE3# Input CMOS Active low input for enabling Q3 pair. This pin has an internal pull- down. 1 =disable outputs, 0 = enable outputs 33 Q4+ Output HCSL Differential true clock output 34 Q4- Output HCSL Differential complementary clock output 35 OE4# Input CMOS Active low input for enabling Q4 pair. This pin has an internal pull- down. 1 =disable outputs, 0 = enable outputs 36 Q5+ Output HCSL Differential true clock output 37 Q5- Output HCSL Differential complementary clock output 38 OE5# Input CMOS Active low input for enabling Q5 pair. This pin has an internal pull- down. 1 =disable outputs, 0 = enable outputs Input notifies device to sample latched inputs and start up on first high 40 PD# Input CMOS assertion. Low enters Power Down Mode, subsequent high assertions exit Power Down Mode. This pin has internal pull-up resistor. PI6CG33601C www.diodes.com January 2020 Document Number DS42295 Rev 3-2 3 Diodes Incorporated