Datasheet ADL5501 (Analog Devices) - 10

ADL5501 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VPOS 1 6 VRMS ADL5501 FLTR 2 5 ENBL TOP VIEW (Not to Scale)
03 0
RFIN 3 4 COMM
6- 05 06 Figure 3. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1 VPOS Supply Voltage Pin. Operational range 2.7 V to 5.5 V. 2 FLTR Square-Domain Filter Pin. Connection for an external capacitor to lower the corner frequency of the square- domain (or modulation) filter. Capacitor is connected between FLTR and VS and forms a low-pass filter with an 8 kΩ on-chip resistor. The on-chip capacitor provides filtering with an approximate 100 kHz corner frequency. For simple waveforms, no further filtering of the demodulated signal is required. 3 RFIN Signal Input Pin. Internally ac-coupled after internal termination resistance. Nominal 50 Ω input impedance. 4 COMM Device Ground Pin. 5 ENBL Enable Pin. Connect pin to VS for normal operation. Connect pin to ground for disable mode for a supply current less than 1 μA. 6 VRMS Output Pin. Rail-to-rail voltage output with limited 3 mA current drive capability. The output has an internal 100 Ω series resistance. High resistive loads are recommended to preserve output swing. Rev. B | Page 10 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION FILTERING APPLICATIONS INFORMATION BASIC CONNECTIONS OUTPUT SWING LINEARITY INPUT COUPLING USING A SERIES RESISTOR MULTIPLE RF INPUTS SELECTING THE SQUARE-DOMAIN FILTER AND OUTPUT LOW-PASS FILTER POWER CONSUMPTION, ENABLE, AND POWER-ON/POWER-OFF RESPONSE TIME OUTPUT DRIVE CAPABILITY AND BUFFERING VRMS OUTPUT OFFSET DEVICE CALIBRATION AND ERROR CALCULATION CALIBRATION FOR IMPROVED ACCURACY DRIFT OVER A REDUCED TEMPERATURE RANGE OPERATION BELOW 100 MHz EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE