Datasheet AD9375 (Analog Devices)

Integrated, Dual RF Transceiver with Observation Path Data Sheet AD9375 FEATURES
The transceiver consists of wideband direct conversion signal
Dual differential Tx
paths with state-of-the-art noise figure and linearity. Each complete
Dual differential Rx
Rx and Tx subsystem includes dc offset correction, quadrature error
Observation receiver with 2 inputs
correction (QEC), and programmable digital filters, eliminating
Fully integrated, ultralow power DPD actuator and adaptation
the need for these functions in the digital baseband. Several
engine for PA linearization
auxiliary functions such as an auxiliary analog-to-digital converter
Sniffer receiver with 3 inputs
(ADC), auxiliary digital-to-analog converters (DACs), and general-
Tunable range: 300 MHz to 6000 MHz
purpose input/outputs (GPIOs) are integrated to provide additional
Linearization signal BW to 40 MHz
monitoring and control capability.
Tx synthesis BW to 250 MHz
An ORx channel with two inputs is included to monitor each Tx
Rx BW: 8 MHz to 100 MHz
output and implement calibration applications. This channel also
Supports FDD and TDD operation
connects to three sniffer receiver (SnRx) inputs that can monitor
Fully integrated independent fractional-N RF synthesizers for
radio activity in different bands.
Tx, Rx, ORx, and clock generation JESD204B digital interface
The high speed JESD204B interface supports lane rates up to 6144 Mbps. Four lanes are dedicated to the transmitters and four
APPLICATIONS
lanes are dedicated to the receiver and observation receiver channels.
3G/4G small cell base transceiver station (BTS)
The fully integrated phase-locked loops (PLLs) provide high
3G/4G massive MIMO/active antenna systems
performance, low power, fractional-N frequency synthesis for
GENERAL DESCRIPTION
the Tx, the Rx, the ORx, and the clock sections. Careful design The AD9375 is a highly integrated, wideband radio frequency (RF) and layout techniques provide the isolation demanded in high transceiver offering dual-channel transmitters (Tx) and receivers performance base station applications. Al voltage controlled (Rx), integrated synthesizers, a ful y integrated digital predistortion oscil ator (VCO) and loop filter components are integrated to (DPD) actuator and adaptation engine, and digital signal processing minimize the external component count. functions. The IC delivers a versatile combination of high The device contains a fully integrated, low power DPD actuator performance and low power consumption required by 3G/4G and adaptation engine for use in PA linearization. The DPD feature small cell and massive multiple input, multiple output (MIMO) enables use of high efficiency PAs, significantly reducing the power equipment in both frequency division duplex (FDD) and time consumption of small cell base station radios while also reducing division duplex (TDD) applications. The AD9375 operates from the number of JESD204B lanes necessary to interface with baseband 300 MHz to 6000 MHz, covering most of the licensed and unlicensed processors. cel ular bands. The DPD algorithm supports linearization on A 1.3 V supply is required to power the AD9375 core, and a signal bandwidths up to 40 MHz depending on the power amplifier standard 4-wire serial port controls it. Other voltage supplies (PA) characteristics (for example, two adjacent 20 MHz carriers). provide proper digital interface levels and optimize transmitter The IC supports Rx bandwidths up to 100 MHz. It also supports and auxiliary converter performance. The AD9375 is packaged in a observation receiver (ORx) and Tx synthesis bandwidths up to 12 mm × 12 mm, 196-ball chip scale ball grid array (CSP_BGA). 250 MHz to accommodate digital correction algorithms.
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Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Current and Power Consumption Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Reflow Profile Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 700 MHz Band 2.6 GHz Band 3.5 GHz Band 5.5 GHz Band Theory of Operation Transmitter (Tx) Receiver (Rx) Observation Receiver (ORx) Sniffer Receiver (SnRx) Clock Input Synthesizers RF PLL Clock PLL Serial Peripheral Interface (SPI) GPIO_x AND GPIO_3P3_x Pins Auxiliary Converters Auxiliary ADC Inputs (AUXADC_x) Auxiliary DACs (AUXDAC_x) JESD204B Data Interface Power Supply Sequence Digital Predistortion (DPD) JTAG Boundary Scan Outline Dimensions Ordering Guide