Datasheet AD9363 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | RF Agile Transceiver |
| 页数 / 页 | 32 / 3 — Data Sheet. AD9363. SPECIFICATIONS. Table 1. Parameter1. Symbol Min. Typ. … |
| 修订版 | D |
| 文件格式/大小 | PDF / 529 Kb |
| 文件语言 | 英语 |
Data Sheet. AD9363. SPECIFICATIONS. Table 1. Parameter1. Symbol Min. Typ. Max. Unit. Test Conditions/Comments
该数据表的模型线
文件文字版本
link to page 5
Data Sheet AD9363 SPECIFICATIONS
Electrical characteristics at VDD_GPO = 3.3 V, VDD_INTERFACE = 1.8 V, and all other VDDx pins (VDDA1P3_TX_LO, VDDA1P3_ TX_VCO_LDO, VDDA1P3_RX_LO, VDDA1P3_RX_VCO_LDO, VDDA1P3_RX_RF, VDDA1P3_RX_TX, VDDA1P3_TX_LO_BUFFER, VDDA1P3_TX_SYNTH, VDDA1P3_RX_SYNTH, VDDD1P3_DIG, and VDDA1P3_BB) = 1.3 V, TA = 25°C, unless otherwise noted.
Table 1. Parameter1 Symbol Min Typ Max Unit Test Conditions/Comments
RECEIVERS, GENERAL Center Frequency 325 3800 MHz Rx Bandwidth 20 MHz Gain Minimum 0 dB Maximum 74.5 dB At 800 MHz 73.0 dB At 2300 MHz (RX1A_x, RX2A_x) 72.0 dB At 2300 MHz (RX1B_x, RX1C_x, RX2B_x, RX2C_x) Gain Step 1 dB Received Signal Strength Indicator RSSI Range 100 dB Accuracy ±2 dB RECEIVERS, 800 MHz Noise Figure NF 2.5 dB Maximum Rx gain Third-Order Input Intermodulation IIP3 −18 dBm Maximum Rx gain Intercept Point Second-Order Input Intermodulation IIP2 40 dBm Maximum Rx gain Intercept Point Local Oscillator (LO) Leakage −122 dBm At Rx front-end input Quadrature Gain Error 0.2 % Phase Error 0.2 Degrees Modulation Accuracy (EVM) −34 dB 19.2 MHz reference clock Input Return Loss S11 −10 dB RX1x_x to RX2x_x Isolation RX1A_x to RX2A_x, RX1C_x to RX2C_x 70 dB RX1B_x to RX2B_x 55 dB RX2_x to RX1_x Isolation RX2A_x to RX1A_x, RX2C_x to RX1C_x 70 dB RX2B_x to RX1B_x 55 dB RECEIVERS, 2.4 GHz Noise Figure NF 3 dB Maximum Rx gain Third-Order Input Intermodulation IIP3 −14 dBm Maximum Rx gain Intercept Point Second-Order Input Intermodulation IIP2 45 dBm Maximum Rx gain Intercept Point Local Oscillator (LO) Leakage −110 dBm At Rx front-end input Quadrature Gain Error 0.2 % Phase Error 0.2 Degrees Modulation Accuracy (EVM) −34 dB 40 MHz reference clock Input Return Loss S11 −10 dB RX1x_x to RX2x_x Isolation RX1A_x to RX2A_x, RX1C_x to RX2C_x 65 dB RX1B_x to RX2B_x 50 dB Rev. D | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS CURRENT CONSUMPTION—VDD_INTERFACE CURRENT CONSUMPTION—VDDx (COMBINATION OF ALL 1.3 V SUPPLIES) ABSOLUTE MAXIMUM RATINGS REFLOW PROFILE THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 800 MHZ FREQUENCY BAND 2.4 GHZ FREQUENCY BAND THEORY OF OPERATION GENERAL RECEIVER TRANSMITTER CLOCK INPUT OPTIONS SYNTHESIZERS RF PLLs BB PLL DIGITAL DATA INTERFACE DATA_CLK Signal FB_CLK Signal RX_FRAME and TX_FRAME Signals ENABLE STATE MACHINE SPI Control Mode Pin Control Mode SPI INTERFACE CONTROL PINS Control Outputs (CTRL_OUT7 to CTRL_OUT0) Control Inputs (CTRL_IN3 to CTRL_IN0) GPO PINS (GPO_3 TO GPO_0) AUXILIARY CONVERTERS AUXADC AUXDAC1 and AUXDAC2 POWERING THE AD9363 APPLICATIONS INFORMATION PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD9363 SPECIFICATIONS
Electrical characteristics at VDD_GPO = 3.3 V, VDD_INTERFACE = 1.8 V, and all other VDDx pins (VDDA1P3_TX_LO, VDDA1P3_ TX_VCO_LDO, VDDA1P3_RX_LO, VDDA1P3_RX_VCO_LDO, VDDA1P3_RX_RF, VDDA1P3_RX_TX, VDDA1P3_TX_LO_BUFFER, VDDA1P3_TX_SYNTH, VDDA1P3_RX_SYNTH, VDDD1P3_DIG, and VDDA1P3_BB) = 1.3 V, TA = 25°C, unless otherwise noted.
Table 1. Parameter1 Symbol Min Typ Max Unit Test Conditions/Comments
RECEIVERS, GENERAL Center Frequency 325 3800 MHz Rx Bandwidth 20 MHz Gain Minimum 0 dB Maximum 74.5 dB At 800 MHz 73.0 dB At 2300 MHz (RX1A_x, RX2A_x) 72.0 dB At 2300 MHz (RX1B_x, RX1C_x, RX2B_x, RX2C_x) Gain Step 1 dB Received Signal Strength Indicator RSSI Range 100 dB Accuracy ±2 dB RECEIVERS, 800 MHz Noise Figure NF 2.5 dB Maximum Rx gain Third-Order Input Intermodulation IIP3 −18 dBm Maximum Rx gain Intercept Point Second-Order Input Intermodulation IIP2 40 dBm Maximum Rx gain Intercept Point Local Oscillator (LO) Leakage −122 dBm At Rx front-end input Quadrature Gain Error 0.2 % Phase Error 0.2 Degrees Modulation Accuracy (EVM) −34 dB 19.2 MHz reference clock Input Return Loss S11 −10 dB RX1x_x to RX2x_x Isolation RX1A_x to RX2A_x, RX1C_x to RX2C_x 70 dB RX1B_x to RX2B_x 55 dB RX2_x to RX1_x Isolation RX2A_x to RX1A_x, RX2C_x to RX1C_x 70 dB RX2B_x to RX1B_x 55 dB RECEIVERS, 2.4 GHz Noise Figure NF 3 dB Maximum Rx gain Third-Order Input Intermodulation IIP3 −14 dBm Maximum Rx gain Intercept Point Second-Order Input Intermodulation IIP2 45 dBm Maximum Rx gain Intercept Point Local Oscillator (LO) Leakage −110 dBm At Rx front-end input Quadrature Gain Error 0.2 % Phase Error 0.2 Degrees Modulation Accuracy (EVM) −34 dB 40 MHz reference clock Input Return Loss S11 −10 dB RX1x_x to RX2x_x Isolation RX1A_x to RX2A_x, RX1C_x to RX2C_x 65 dB RX1B_x to RX2B_x 50 dB Rev. D | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS CURRENT CONSUMPTION—VDD_INTERFACE CURRENT CONSUMPTION—VDDx (COMBINATION OF ALL 1.3 V SUPPLIES) ABSOLUTE MAXIMUM RATINGS REFLOW PROFILE THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 800 MHZ FREQUENCY BAND 2.4 GHZ FREQUENCY BAND THEORY OF OPERATION GENERAL RECEIVER TRANSMITTER CLOCK INPUT OPTIONS SYNTHESIZERS RF PLLs BB PLL DIGITAL DATA INTERFACE DATA_CLK Signal FB_CLK Signal RX_FRAME and TX_FRAME Signals ENABLE STATE MACHINE SPI Control Mode Pin Control Mode SPI INTERFACE CONTROL PINS Control Outputs (CTRL_OUT7 to CTRL_OUT0) Control Inputs (CTRL_IN3 to CTRL_IN0) GPO PINS (GPO_3 TO GPO_0) AUXILIARY CONVERTERS AUXADC AUXDAC1 and AUXDAC2 POWERING THE AD9363 APPLICATIONS INFORMATION PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE