Datasheet ADF4602 (Analog Devices) - 2

制造商Analog Devices
描述Single-Chip, Multiband 3G Femtocell Transceiver
页数 / 页36 / 2 — ADF4602. TABLE OF CONTENTS. REVISION HISTORY. 2/11—Rev. 0 to Rev. A. …
修订版A
文件格式/大小PDF / 662 Kb
文件语言英语

ADF4602. TABLE OF CONTENTS. REVISION HISTORY. 2/11—Rev. 0 to Rev. A. 10/09—Revision 0: Initial Version

ADF4602 TABLE OF CONTENTS REVISION HISTORY 2/11—Rev 0 to Rev A 10/09—Revision 0: Initial Version

该数据表的模型线

文件文字版本

link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 4 link to page 8 link to page 9 link to page 9 link to page 10 link to page 12 link to page 19 link to page 19 link to page 20 link to page 20 link to page 20 link to page 23 link to page 24 link to page 25 link to page 25 link to page 26 link to page 26 link to page 27 link to page 31 link to page 31 link to page 33 link to page 33 link to page 35 link to page 35
ADF4602 TABLE OF CONTENTS
Features .. 1  Receiver Description.. 20  Applications... 1  Power Management ... 23  Functional Block Diagram .. 1  Frequency Synthesis... 24  Revision History ... 2  Serial Port Interface (SPI).. 25  General Description ... 3  Operation and Timing... 25  Specifications... 4  Registers... 26  Timing Characteristics... 8  Register Map ... 26  Absolute Maximum Ratings.. 9  Register Description .. 27  ESD Caution.. 9  Software Initialization Procedure... 31  Pin Configuration and Function Descriptions... 10  Initialization Sequence .. 31  Typical Performance Characteristics ... 12  Applications Information .. 33  Theory of Operation .. 19  Interfacing the ADF4602 to the AD9963.. 33  Transmitter Description .. 19  Outline Dimensions ... 35  DACs .. 20  Ordering Guide .. 35  General Purpose Outputs.. 20 
REVISION HISTORY 2/11—Rev. 0 to Rev. A
Changes to Features and Applications... 1 Changes to Table 1.. 4 Changes to Table 3.. 9 Changes to Figure 4.. 10 Changes to Figure 13.. 13 Changes to Figure 21 and Figure 22... 14 Changes to Figure 26 and Figure 27... 15 Changes to Figure 31 through Figure 33 ... 16 Changes to Figure 44.. 21 Changes to DC Offset Compensation Section ... 23 Changes to Figure 51.. 26 Changes to Table 13.. 30 Replaced Applications Information Section ... 33 Changes to Figure 53.. 34
10/09—Revision 0: Initial Version
Rev. A | Page 2 of 36 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION TRANSMITTER DESCRIPTION I/Q Baseband I/Q Modulator VCO Output TX Output Baluns DACS GENERAL PURPOSE OUTPUTS RECEIVER DESCRIPTION LNAs Mixers Baseband Section Gain Control DC Offset Compensation POWER MANAGEMENT FREQUENCY SYNTHESIS Reference Path SERIAL PORT INTERFACE (SPI) Format OPERATION AND TIMING Read REGISTERS REGISTER MAP REGISTER DESCRIPTION SOFTWARE INITIALIZATION PROCEDURE INITIALIZATION SEQUENCE Nonvolatile Memory (NVM) Initialization Programming Transmit and Receive frequencies APPLICATIONS INFORMATION INTERFACING THE ADF4602 TO THE AD9963 AD9963 ADC Inputs Interfacing to the AD9963 Rx Baseband Inputs AD9963 DAC Outputs Reference Voltage Current Scaling Resistor, RSET Gain Scaling Parameters RECEIVE SENSITIVITY Interfacing to the AD9963 TX Baseband Outputs OUTLINE DIMENSIONS ORDERING GUIDE