Datasheet ADCMP600, ADCMP601, ADCMP602 (Analog Devices) - 3

ADCMP600/ADCMP601/ADCMP602 SPECIFICATIONS ELECTRICAL CHARACTERISTICS
VCCI = VCCO = 2.5 V, TA = 25°C, unless otherwise noted.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
DC INPUT CHARACTERISTICS Voltage Range V , V V = 2.5 V to 5.5 V −0.5 V + 0.2 V P N CC CC Common-Mode Range V = 2.5 V to 5.5 V −0.2 V + 0.2 V CC CC Differential Voltage V = 2.5 V to 5.5 V V + 0.8 V CC CC Offset Voltage V −5.0 ±2 +5.0 mV OS Bias Current I , I −5.0 ±2 +5.0 µA P N Offset Current −2.0 +2.0 µA Capacitance C , C 1 pF P N Resistance, Differential Mode −0.1 V to V 200 700 kΩ CC Resistance, Common Mode −0.5 V to V + 0.5 V 100 350 kΩ CC Active Gain A 85 dB V Common-Mode Rejection Ratio CMRR V = 2.5 V, V = 2.5 V, 50 dB CCI CCO V = −0.2 V to +2.7 V CM V = 2.5 V, V = 5.5 V 50 dB CCI CCO Hysteresis (ADCMP600) 2 mV Hysteresis (ADCMP601/ADCMP602) R = ∞ 0.1 mV HYS LATCH ENABLE PIN CHARACTERISTICS (ADCMP601/ADCMP602 Only) V Hysteresis is shut off 2.0 V V IH CC V Latch mode guaranteed −0.2 +0.4 +0.8 V IL I V = V −6 +6 µA IH IH CC I V = 0.4 V −0.1 +0.1 mA OL IL HYSTERESIS MODE AND TIMING (ADCMP601/ADCMP602 Only) Hysteresis Mode Bias Voltage Current −1 μA 1.145 1.25 1.35 V Resistor Value Hysteresis = 120 mV 65 80 120 kΩ Hysteresis Current Hysteresis = 120 mV −18 −12 −7 µA Latch Setup Time t V = 50 mV −2 ns S OD Latch Hold Time t V = 50 mV 2.6 ns H OD Latch-to-Output Delay t , t V = 50 mV 27 ns PLOH PLOL OD Latch Minimum Pulse Width t V = 50 mV 21 ns PL OD SHUTDOWN PIN CHARACTERISTICS (ADCMP602 Only) V Comparator is operating 2.0 V V IH CCO V Shutdown guaranteed −0.2 +0.4 +0.6 V IL I V = V −6 6 µA IH IH CC I V = 0 V −100 µA OL IL Sleep Time t I < 500 µA 20 ns SD CCO Wake-Up Time t V = 100 mV, output valid 50 ns H OD DC OUTPUT CHARACTERISTICS V = 2.5 V to 5.5 V CCO Output Voltage High Level V I = 8 mA, V = 2.5 V V − 0.4 V OH OH CCO CC Output Voltage Low Level V I = 8 mA, V = 2.5 V 0.4 V OL OL CCO Output Voltage High Level at −40°C V I = 6 mA, V = 2.5 V V − 0.4 V OH OH CCO CC Output Voltage Low Level at− 40°C V I = 6 mA, V = 2.5 V 0.4 V OL OL CCO Rev. A | Page 3 of 16 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Timing Information Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Application Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Using/Disabling the Latch Feature Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Application Circuits Outline Dimensions Ordering Guide