Datasheet LT1716 (Analog Devices) - 10

LT1716
APPLICATIONS INFORMATION
The LT1716 comparator features low power operation A Schottky diode in the collector of each NPN transistor with exceptional input precision with rail-to-rail input and of the NPN input stage allows the LT1716 to operate with output swing. The comparator operates flawlessly even either or both of its inputs above V+. At about 0.3V above when the inputs are pulled over the positive rail or below V+, the NPN transistor is fully saturated and the input bias the negative rail. current is typically 4µA at room temperature. The input offset voltage is typically 500µV when operating above
Supply Voltage
V+. The LT1716 will operate with its input 44V above V–, The LT1716 operates from 2.7V to 44V. The comparator regardless of V+. can be shut down by removing V+. In this condition, the The transition to the negative common mode input stage input bias current is typically less than 3nA, even if the occurs at 0.3V above V–. Above this trip point the PNP inputs are 44V above the negative supply. The LT1716 is stage is active. When the inputs are 0.3V below V–, the protected against reverse battery voltages of up to 20V. common base input stage is active in addition to the PNP The reverse battery current is resistive as shown in the stage. The input bias current out of each input becomes Reverse Supply Current graph. VIN/5kΩ. The LT1716 is designed to operate when either input falls below the negative supply. Internal resistors
Inputs
protect the inputs for faults below the negative supply of The comparator inputs can swing from 0.5V above to 44V up to 5V without phase reversal. The built-in 5k resistor above V–. If one input is within this range, the other input limits the current at each input to 1mA at 5V below the can be forced up to 5V below V– without phase reversal negative supply. External matched input resistors can occuring at the output. be added for increased voltage fault operation below the negative supply but the maximum input current should The LT1716 has three stages—NPN, PNP and common be kept under 1mA. base (see Simplified Schematic)—resulting in three distinct operating regions and two transition regions as
Input Protection
shown in the Input Bias Current vs Common Mode typical performance curve. The inverting and noninverting input pins of the LT1716 have on-chip protection. ESD protection is provided to For input voltages about 0.8V or more below V+, the PNP prevent damage during handling. The input transistors input stage is active and the input bias current is typically have voltage clamping and limiting resistors to protect –4nA. The PNP differential input stage will have bias cur- against excursions as much as 5V below V–. There are rent that flows out of the device. With a differential input no clamping diodes between the inputs and the maximum voltage of even just 100mV or so, there will be zero bias differential input voltage is 44V. current into the higher of the two inputs, while the current flowing out of the lower input will be twice the measured
Output
bias current. The output stage of the LT1716 can drive loads connected When the input voltage is about 0.5V or less from V+, the to a supply more positive than the device, the same as NPN state is operating and the input bias current is typically comparators with open collector output stages. The 10nA. Increases in temperature will cause the voltage at output of the LT1716 can be pulled up to 44V above V–, which operation switches from the PNP stage to the NPN regardless of V+. stage to move towards V+. The input offset voltage of the NPN stage is untrimmed and is typically 500µV. Rev. B 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Applications Information Simplified Schematic Package Description Revision History Typical ApplicationS Related Parts