Datasheet ADP1765 (Analog Devices) - 6

制造商Analog Devices
描述5 A, Low VIN, Low Noise, CMOS Linear Regulator
页数 / 页20 / 6 — ADP1765. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. SEN. …
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ADP1765. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. SEN. VIN 1. 12 VOUT. VIN 2. 11 VOUT. VIN 3. TOP VIEW. 10 VOUT

ADP1765 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SEN VIN 1 12 VOUT VIN 2 11 VOUT VIN 3 TOP VIEW 10 VOUT

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ADP1765 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SE EN PG SS SEN 61 51 4 3 1 1 VIN 1 12 VOUT VIN 2 11 VOUT ADP1765 VIN 3 TOP VIEW 10 VOUT (Not to Scale) VIN 4 9 VOUT 5 6 7 8 D EG CAP ADJ F GN VR V RE NOTES 1. THE EXPOSED PAD IS ELECTRICALLY CONNECTED TO GND. IT IS RECOMMENDED THAT THIS PAD BE CONNECTED TO A GROUND
003
PLANE ON THE PCB. THE EXPOSED PAD IS
3-
ON THE BOTTOM OF THE PACKAGE.
1393 Figure 3. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Description
1 to 4 VIN Regulator Input Supply. Bypass VIN to GND with a 22 μF or greater capacitor. Note that all four VIN pins must be connected to the source supply. 5 REFCAP Reference Filter Capacitor. Connect a 1 μF capacitor from the REFCAP pin to ground. Do not connect a load from this pin to ground. 6 VREG Regulated Input Supply to LDO Amplifier. Bypass VREG to GND with a 1 μF or greater capacitor. Do not connect a load from this pin to ground. 7 GND Ground. 8 VADJ Adjustable Voltage Pin for the Adjustable Output Option. Connect a 10 kΩ external resistor between the VADJ pin and ground to set the output voltage to 1.5 V. For the fixed output option, leave this pin floating. 9 to 12 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 22 μF or greater capacitor. Note that all four VOUT pins must be connected to the load. 13 SENSE Sense Input. The SENSE pin measures the actual output voltage at the load and feeds it to the error amplifier. Connect SENSE as close to the load as possible to minimize the effect of IR drop between VOUT and the load. 14 SS Soft Start Pin. A capacitor connected to this pin determines the soft start time. 15 PG Power-Good Output. This open-drain output requires an external pull-up resistor. If the device is in shutdown mode, current-limit mode, or thermal shutdown mode, or if the VOUT voltage falls below 90% of the nominal output voltage, the PG pin immediately transitions to low. 16 EN Enable Input. Drive the EN pin high to turn on the regulator. Drive the EN pin low to turn off the regulator. For automatic startup, connect the EN pin to the VIN pin. EP Exposed Pad. The exposed pad is electrically connected to GND. It is recommended that this pad be connected to a ground plane on the PCB. The exposed pad is on the bottom of the package. Rev. A | Page 6 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUITS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR: RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE/PARAMETER ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT START FUNCTION ADJUSTABLE OUTPUT VOLTAGE ENABLE FEATURE POWER-GOOD (PG) FEATURE APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION PARALLELING ADP1765 DEVICES FOR HIGH CURRENT APPLICATIONS THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE